On Wed, 13 May 2020, Anshuman Gupta <[email protected]> wrote:
> HDCP code doesn't require to access power_well internal stuff,
> instead it should use the intel_display_power_well_is_enabled()
> to get the status of desired power_well.
> No functional change.
>
> Cc: Jani Nikula <[email protected]>
> Signed-off-by: Anshuman Gupta <[email protected]>
> ---
> drivers/gpu/drm/i915/display/intel_hdcp.c | 16 ++++------------
> 1 file changed, 4 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
> b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index d0a2bee9035a..409bd5d98a81 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -148,9 +148,8 @@ static int intel_hdcp_poll_ksv_fifo(struct
> intel_digital_port *intel_dig_port,
>
> static bool hdcp_key_loadable(struct drm_i915_private *dev_priv)
> {
> - struct i915_power_domains *power_domains = &dev_priv->power_domains;
> - struct i915_power_well *power_well;
> enum i915_power_well_id id;
> + intel_wakeref_t wakeref;
> bool enabled = false;
>
> /*
> @@ -162,17 +161,10 @@ static bool hdcp_key_loadable(struct drm_i915_private
> *dev_priv)
> else
> id = SKL_DISP_PW_1;
>
> - mutex_lock(&power_domains->lock);
> -
> /* PG1 (power well #1) needs to be enabled */
> - for_each_power_well(dev_priv, power_well) {
> - if (power_well->desc->id == id) {
> - enabled = power_well->desc->ops->is_enabled(dev_priv,
> - power_well);
> - break;
> - }
> - }
> - mutex_unlock(&power_domains->lock);
> + wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
> + enabled = intel_display_power_well_is_enabled(dev_priv, id);
> + intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
with_intel_runtime_pm(&dev_priv->runtime_pm, wakeref)
enabled = intel_display_power_well_is_enabled(dev_priv, id);
>
> /*
> * Another req for hdcp key loadability is enabled state of pll for
--
Jani Nikula, Intel Open Source Graphics Center
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