On Fri, Jun 05, 2020 at 07:57:36PM -0700, Matt Roper wrote: > HPD pin handling for RKL+TGP is a special case; we effectively select > the HPD pin based on the DDI (A,B,D,E) rather than the PHY (A,B,C,D). > This differs from the regular behavior of RKL+CMP (and also TGL+TGP). > > v2: > - Rather than providing a custom hpd_pin mapping table, just assign > encoder->hpd_pin in a custom manner for this setup. (Ville) > > Cc: Ville Syrjälä <[email protected]> > Signed-off-by: Matt Roper <[email protected]>
Reviewed-by: Ville Syrjälä <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_hotplug.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c > b/drivers/gpu/drm/i915/display/intel_hotplug.c > index 4f6f560e093e..d794dd5f170c 100644 > --- a/drivers/gpu/drm/i915/display/intel_hotplug.c > +++ b/drivers/gpu/drm/i915/display/intel_hotplug.c > @@ -89,6 +89,15 @@ enum hpd_pin intel_hpd_pin_default(struct drm_i915_private > *dev_priv, > { > enum phy phy = intel_port_to_phy(dev_priv, port); > > + /* > + * RKL + TGP PCH is a special case; we effectively choose the hpd_pin > + * based on the DDI rather than the PHY (i.e., the last two outputs > + * shold be HPD_PORT_{D,E} rather than {C,D}. Note that this differs > + * from the behavior of both TGL+TGP and RKL+CMP. > + */ > + if (IS_ROCKETLAKE(dev_priv) && HAS_PCH_TGP(dev_priv)) > + return HPD_PORT_A + port - PORT_A; > + > switch (phy) { > case PHY_F: > return IS_CNL_WITH_PORT_F(dev_priv) ? HPD_PORT_E : HPD_PORT_F; > -- > 2.24.1 -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
