On Thu, Jun 11, 2020 at 04:31:08PM -0700, [email protected] wrote:
> From: Clint Taylor <[email protected]>
>
> Enable HW Default flip for small PL.
>
> bspec: 52890
> bspec: 53508
> bspec: 53273
>
> Signed-off-by: Clint Taylor <[email protected]>
Reviewed-by: Matt Atwood <[email protected]>
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 6 ++++++
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> 2 files changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 2da366821dda..0b9091c05e06 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -628,6 +628,9 @@ static void tgl_ctx_workarounds_init(struct
> intel_engine_cs *engine,
> WA_SET_FIELD_MASKED(GEN8_CS_CHICKEN1,
> GEN9_PREEMPT_GPGPU_LEVEL_MASK,
> GEN9_PREEMPT_GPGPU_THREAD_GROUP_LEVEL);
> +
> + /* Wa_1406941453:gen12 */
> + WA_SET_BIT_MASKED(GEN10_SAMPLER_MODE, ENABLE_SMALLPL);
> }
>
> static void
> @@ -1500,6 +1503,9 @@ static void icl_whitelist_build(struct intel_engine_cs
> *engine)
> whitelist_reg_ext(w, PS_INVOCATION_COUNT,
> RING_FORCE_TO_NONPRIV_ACCESS_RD |
> RING_FORCE_TO_NONPRIV_RANGE_4);
> +
> + /* Wa_1406941453:gen12 */
> + whitelist_reg(w, GEN10_SAMPLER_MODE);
> break;
>
> case VIDEO_DECODE_CLASS:
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 19e1fed198c3..fbb095a94b3a 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -9223,6 +9223,7 @@ enum {
> #define GEN11_LSN_UNSLCVC_GAFS_HALF_SF_MAXALLOC (1 << 7)
>
> #define GEN10_SAMPLER_MODE _MMIO(0xE18C)
> +#define ENABLE_SMALLPL REG_BIT(15)
> #define GEN11_SAMPLER_ENABLE_HEADLESS_MSG REG_BIT(5)
>
> /* IVYBRIDGE DPF */
> --
> 2.26.0
>
> _______________________________________________
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