From: Ville Syrjälä <ville.syrj...@linux.intel.com>

GLK supposedly does not need WaFbcTurnOffFbcWatermark,
so let's not apply it.

Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 18 ++++++++++++++++--
 1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 63d1a4882727..8760e1ba1eee 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -94,10 +94,8 @@ static void gen9_init_clock_gating(struct drm_i915_private 
*dev_priv)
        I915_WRITE(GEN8_CHICKEN_DCPR_1,
                   I915_READ(GEN8_CHICKEN_DCPR_1) | MASK_WAKEMEM);
 
-       /* WaFbcTurnOffFbcWatermark:skl,bxt,kbl,cfl */
        /* WaFbcWakeMemOn:skl,bxt,kbl,glk,cfl */
        I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) |
-                  DISP_FBC_WM_DIS |
                   DISP_FBC_MEMORY_WAKE);
 
        /* WaFbcHighMemBwCorruptionAvoidance:skl,bxt,kbl,cfl */
@@ -140,6 +138,10 @@ static void bxt_init_clock_gating(struct drm_i915_private 
*dev_priv)
         * application, using batch buffers or any other means.
         */
        I915_WRITE(RM_TIMEOUT, MMIO_TIMEOUT_US(950));
+
+       /* WaFbcTurnOffFbcWatermark:bxt */
+       I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) |
+                  DISP_FBC_WM_DIS);
 }
 
 static void glk_init_clock_gating(struct drm_i915_private *dev_priv)
@@ -7189,6 +7191,10 @@ static void cfl_init_clock_gating(struct 
drm_i915_private *dev_priv)
        cnp_init_clock_gating(dev_priv);
        gen9_init_clock_gating(dev_priv);
 
+       /* WaFbcTurnOffFbcWatermark:cfl */
+       I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) |
+                  DISP_FBC_WM_DIS);
+
        /* WaFbcNukeOnHostModify:cfl */
        I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) |
                   ILK_DPFC_NUKE_ON_ANY_MODIFICATION);
@@ -7208,6 +7214,10 @@ static void kbl_init_clock_gating(struct 
drm_i915_private *dev_priv)
                I915_WRITE(GEN6_UCGCTL1, I915_READ(GEN6_UCGCTL1) |
                           GEN6_GAMUNIT_CLOCK_GATE_DISABLE);
 
+       /* WaFbcTurnOffFbcWatermark:kbl */
+       I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) |
+                  DISP_FBC_WM_DIS);
+
        /* WaFbcNukeOnHostModify:kbl */
        I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) |
                   ILK_DPFC_NUKE_ON_ANY_MODIFICATION);
@@ -7221,6 +7231,10 @@ static void skl_init_clock_gating(struct 
drm_i915_private *dev_priv)
        I915_WRITE(FBC_LLC_READ_CTRL, I915_READ(FBC_LLC_READ_CTRL) |
                   FBC_LLC_FULLY_OPEN);
 
+       /* WaFbcTurnOffFbcWatermark:skl */
+       I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) |
+                  DISP_FBC_WM_DIS);
+
        /* WaFbcNukeOnHostModify:skl */
        I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) |
                   ILK_DPFC_NUKE_ON_ANY_MODIFICATION);
-- 
2.26.2

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