On Tue, Jul 14, 2020 at 06:31:40PM +0300, Imre Deak wrote: > According to BSpec this flag should not be changed while the DDI > function is enabled. On BDW+ the DP_TP_CTL register spec also states it > explicitly that the HW takes care of enabling/disabling the scrambling > for training patterns (and it must stay enabled for normal pixel > output). Assume that this HW automatic handling of scrambling is also > true for HSW.
It is at least marked as debug only for hsw. Reviewed-by: Ville Syrjälä <[email protected]> > > BSpec: 8013, 7557, 50484 > > Signed-off-by: Imre Deak <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_ddi.c | 8 +------- > 1 file changed, 1 insertion(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c > b/drivers/gpu/drm/i915/display/intel_ddi.c > index 2c484b55bcdf..c467f18d5e1b 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -4037,8 +4037,7 @@ static void intel_ddi_prepare_link_retrain(struct > intel_dp *intel_dp) > intel_wait_ddi_buf_idle(dev_priv, port); > } > > - dp_tp_ctl = DP_TP_CTL_ENABLE | > - DP_TP_CTL_LINK_TRAIN_PAT1 | DP_TP_CTL_SCRAMBLE_DISABLE; > + dp_tp_ctl = DP_TP_CTL_ENABLE | DP_TP_CTL_LINK_TRAIN_PAT1; > if (intel_dp->link_mst) > dp_tp_ctl |= DP_TP_CTL_MODE_MST; > else { > @@ -4066,11 +4065,6 @@ static void intel_ddi_set_link_train(struct intel_dp > *intel_dp, > > temp = intel_de_read(dev_priv, intel_dp->regs.dp_tp_ctl); > > - if (dp_train_pat & DP_LINK_SCRAMBLING_DISABLE) > - temp |= DP_TP_CTL_SCRAMBLE_DISABLE; > - else > - temp &= ~DP_TP_CTL_SCRAMBLE_DISABLE; > - > temp &= ~DP_TP_CTL_LINK_TRAIN_MASK; > switch (dp_train_pat & train_pat_mask) { > case DP_TRAINING_PATTERN_DISABLE: > -- > 2.23.1 > > _______________________________________________ > Intel-gfx mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
