Chris Wilson <[email protected]> writes: > Unlike rcs where we have conclusive evidence from our selftesting that > disabling the preparser before performing the TLB invalidate and > relocations does impact upon the GPU execution, the evidence for the > same requirement on xcs is much more circumstantial. Let's apply the > preparser disable between batches as we invalidate the TLB as a dose of > healthy paranoia, just in case. > > References: https://gitlab.freedesktop.org/drm/intel/-/issues/2169 > Signed-off-by: Chris Wilson <[email protected]> > Cc: Mika Kuoppala <[email protected]>
Reviewed-by: Mika Kuoppala <[email protected]> > --- > drivers/gpu/drm/i915/gt/intel_lrc.c | 15 +++++++++++++-- > 1 file changed, 13 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c > b/drivers/gpu/drm/i915/gt/intel_lrc.c > index 29c0fde8b4df..353b1717fe84 100644 > --- a/drivers/gpu/drm/i915/gt/intel_lrc.c > +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c > @@ -4764,14 +4764,21 @@ static int gen12_emit_flush(struct i915_request > *request, u32 mode) > intel_engine_mask_t aux_inv = 0; > u32 cmd, *cs; > > + cmd = 4; > + if (mode & EMIT_INVALIDATE) > + cmd += 2; > if (mode & EMIT_INVALIDATE) > aux_inv = request->engine->mask & ~BIT(BCS0); > + if (aux_inv) > + cmd += 2 * hweight8(aux_inv) + 2; > > - cs = intel_ring_begin(request, > - 4 + (aux_inv ? 2 * hweight8(aux_inv) + 2 : 0)); > + cs = intel_ring_begin(request, cmd); > if (IS_ERR(cs)) > return PTR_ERR(cs); > > + if (mode & EMIT_INVALIDATE) > + *cs++ = preparser_disable(true); > + > cmd = MI_FLUSH_DW + 1; > > /* We always require a command barrier so that subsequent > @@ -4804,6 +4811,10 @@ static int gen12_emit_flush(struct i915_request > *request, u32 mode) > } > *cs++ = MI_NOOP; > } > + > + if (mode & EMIT_INVALIDATE) > + *cs++ = preparser_disable(false); > + > intel_ring_advance(request, cs); > > return 0; > -- > 2.20.1 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
