From: Clint Taylor <[email protected]> Enable HW Default flip for small PL.
bspec: 52890 bspec: 53508 bspec: 53273 v2: rebase to drm-tip v3: move from ctx to gt workarounds. Remove whitelist. Cc: Matt Atwood <[email protected]> Cc: Matt Roper <[email protected]> Cc: José Roberto de Souza <[email protected]> Signed-off-by: Clint Taylor <[email protected]> --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 3 +++ drivers/gpu/drm/i915/i915_reg.h | 1 + 2 files changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index a3f72b75c61e..0aecb97fd41c 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -1211,6 +1211,9 @@ gen12_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) { wa_init_mcr(i915, wal); + + /* Wa_1406941453:gen12 */ + WA_SET_BIT_MASKED(GEN10_SAMPLER_MODE, ENABLE_SMALLPL); } static void diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index ac691927e29d..ab4b1abd4364 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -9315,6 +9315,7 @@ enum { #define GEN11_LSN_UNSLCVC_GAFS_HALF_SF_MAXALLOC (1 << 7) #define GEN10_SAMPLER_MODE _MMIO(0xE18C) +#define ENABLE_SMALLPL REG_BIT(15) #define GEN11_SAMPLER_ENABLE_HEADLESS_MSG REG_BIT(5) /* IVYBRIDGE DPF */ -- 2.28.0 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
