> -----Original Message----- > From: Intel-gfx <[email protected]> On Behalf Of Ville > Syrjala > Sent: Saturday, July 18, 2020 2:44 AM > To: [email protected] > Subject: [Intel-gfx] [PATCH 09/20] drm/i915: Read out CHV CGM degamma > > From: Ville Syrjälä <[email protected]> > > Since CHV has the dedicate CGM degamma unit readout is trivial. > Just do it.
Reviewed-by: Uma Shankar <[email protected]> > Signed-off-by: Ville Syrjälä <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_color.c | 36 ++++++++++++++++++++++ > 1 file changed, 36 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_color.c > b/drivers/gpu/drm/i915/display/intel_color.c > index 437cc56925ab..6842f5c0356d 100644 > --- a/drivers/gpu/drm/i915/display/intel_color.c > +++ b/drivers/gpu/drm/i915/display/intel_color.c > @@ -1030,6 +1030,13 @@ static u32 chv_cgm_degamma_udw(const struct > drm_color_lut *color) > return drm_color_lut_extract(color->red, 14); } > > +static void chv_cgm_degamma_pack(struct drm_color_lut *entry, u32 ldw, > +u32 udw) { > + entry->green = > intel_color_lut_pack(REG_FIELD_GET(CGM_PIPE_DEGAMMA_GREEN_MASK, ldw), > 14); > + entry->blue = > intel_color_lut_pack(REG_FIELD_GET(CGM_PIPE_DEGAMMA_BLUE_MASK, ldw), > 14); > + entry->red = > +intel_color_lut_pack(REG_FIELD_GET(CGM_PIPE_DEGAMMA_RED_MASK, udw), > +14); } > + > static void chv_load_cgm_degamma(struct intel_crtc *crtc, > const struct drm_property_blob *blob) { @@ - > 1821,6 +1828,32 @@ static void i965_read_luts(struct intel_crtc_state > *crtc_state) > crtc_state->hw.gamma_lut = i965_read_lut_10p6(crtc); } > > +static struct drm_property_blob *chv_read_cgm_degamma(struct intel_crtc > +*crtc) { > + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > + int i, lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size; > + enum pipe pipe = crtc->pipe; > + struct drm_property_blob *blob; > + struct drm_color_lut *lut; > + > + blob = drm_property_create_blob(&dev_priv->drm, > + sizeof(struct drm_color_lut) * lut_size, > + NULL); > + if (IS_ERR(blob)) > + return NULL; > + > + lut = blob->data; > + > + for (i = 0; i < lut_size; i++) { > + u32 ldw = intel_de_read(dev_priv, CGM_PIPE_DEGAMMA(pipe, i, > 0)); > + u32 udw = intel_de_read(dev_priv, CGM_PIPE_DEGAMMA(pipe, i, > 1)); > + > + chv_cgm_degamma_pack(&lut[i], ldw, udw); > + } > + > + return blob; > +} > + > static struct drm_property_blob *chv_read_cgm_gamma(struct intel_crtc *crtc) > { > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); @@ -1851,6 > +1884,9 @@ static void chv_read_luts(struct intel_crtc_state *crtc_state) { > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > > + if (crtc_state->cgm_mode & CGM_PIPE_MODE_DEGAMMA) > + crtc_state->hw.degamma_lut = chv_read_cgm_degamma(crtc); > + > if (crtc_state->cgm_mode & CGM_PIPE_MODE_GAMMA) > crtc_state->hw.gamma_lut = chv_read_cgm_gamma(crtc); > else > -- > 2.26.2 > > _______________________________________________ > Intel-gfx mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
