> -----Original Message----- > From: Intel-gfx <[email protected]> On Behalf Of Ville > Syrjala > Sent: Saturday, July 18, 2020 2:44 AM > To: [email protected] > Subject: [Intel-gfx] [PATCH 11/20] drm/i915: Do degamma+gamma readout in > bdw+ split gamma mode > > From: Ville Syrjälä <[email protected]> > > Read out both gamma and degamma when usng the split gamma mode on
s/usng/using With this, Reviewed-by: Uma Shankar <[email protected]> > bdw+. We can't use the auto increment mode to iterate the LUTs since we want > to read out less entries than what we stuff into the software LUT. > > Signed-off-by: Ville Syrjälä <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_color.c | 52 +++++++++++++++++++++- > 1 file changed, 51 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_color.c > b/drivers/gpu/drm/i915/display/intel_color.c > index 5742ac1af862..f34257922e4d 100644 > --- a/drivers/gpu/drm/i915/display/intel_color.c > +++ b/drivers/gpu/drm/i915/display/intel_color.c > @@ -1959,6 +1959,46 @@ static void ilk_read_luts(struct intel_crtc_state > *crtc_state) > crtc_state->hw.gamma_lut = ilk_read_lut_10(crtc); } > > +/* > + * IVB/HSW Bspec / PAL_PREC_INDEX: > + * "Restriction : Index auto increment mode is not > + * supported and must not be enabled." > + */ > +static struct drm_property_blob *ivb_read_lut_10(struct intel_crtc *crtc, > + u32 prec_index) > +{ > + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > + int i, hw_lut_size = ivb_lut_10_size(prec_index); > + int lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size; > + enum pipe pipe = crtc->pipe; > + struct drm_property_blob *blob; > + struct drm_color_lut *lut;/ > + > + blob = drm_property_create_blob(&dev_priv->drm, > + sizeof(struct drm_color_lut) * lut_size, > + NULL); > + if (IS_ERR(blob)) > + return NULL; > + > + lut = blob->data; > + > + for (i = 0; i < lut_size; i++) { > + /* We discard half the user entries in split gamma mode */ > + int index = DIV_ROUND_UP(i * (hw_lut_size - 1), lut_size - 1); > + u32 val; > + > + intel_de_write(dev_priv, PREC_PAL_INDEX(pipe), > + prec_index + index); > + val = intel_de_read(dev_priv, PREC_PAL_DATA(pipe)); > + > + ilk_lut_10_pack(&lut[i], val); > + } > + > + intel_de_write(dev_priv, PREC_PAL_INDEX(pipe), 0); > + > + return blob; > +} > + > /* On BDW+ the index auto increment mode actually works */ static struct > drm_property_blob *bdw_read_lut_10(struct intel_crtc *crtc, > u32 prec_index) > @@ -2006,7 +2046,17 @@ static void bdw_read_luts(struct intel_crtc_state > *crtc_state) > *blob = ilk_read_lut_8(crtc); > break; > case GAMMA_MODE_MODE_SPLIT: > - /* FIXME */ > + /* > + * Can't use bdw_read_lut_10() with its auto-increment > + * mode here since we want to generate 1024 entry > + * software LUTs from the 512 entry hardware LUTs. > + */ > + crtc_state->hw.degamma_lut = > + ivb_read_lut_10(crtc, PAL_PREC_SPLIT_MODE | > + PAL_PREC_INDEX_VALUE(0)); > + crtc_state->hw.gamma_lut = > + ivb_read_lut_10(crtc, PAL_PREC_SPLIT_MODE | > + PAL_PREC_INDEX_VALUE(512)); > break; > case GAMMA_MODE_MODE_10BIT: > *blob = bdw_read_lut_10(crtc, PAL_PREC_INDEX_VALUE(0)); > -- > 2.26.2 > > _______________________________________________ > Intel-gfx mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
