On Wed, 23 Sep 2020 at 12:42, Chris Wilson <ch...@chris-wilson.co.uk> wrote:
>
> In generating the reference LRC, we want a page-aligned address for
> simplicity in computing the offsets within. This then shares the
> computation for the HW LRC which is mapped and so page aligned, making
> the comparison straightforward. It seems that kmalloc(4k) is not always
> returning from a 4k-aligned slab cache (which would give us a page aligned
> address) so force alignment by explicitly allocating a page.
>
> Reported-by: "Gote, Nitin R" <nitin.r.g...@intel.com>
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
> Cc: "Gote, Nitin R" <nitin.r.g...@intel.com>
Reviewed-by: Matthew Auld <matthew.a...@intel.com>
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