It's not actually Dan's coccinelle checker... He is just the (much
appreciated) messenger.
julia
On Mon, 5 Aug 2013, Daniel Vetter wrote:
Thanks for the report, I'll squash in the following fixup:
commit 36bf63c19eb46631fa4556ae54d91a5320a198b2
Author: Daniel Vetter <daniel.vet...@ffwll.ch>
Date: Mon Aug 5 12:28:03 2013 +0200
fixup, reported by Dan Carpenter and his coccinelle checker
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gpu/drm/i915/intel_hdmi.c
index 4092e7f..5cad59f 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -1083,7 +1083,7 @@ static void intel_hdmi_pre_pll_enable(struct
intel_encoder *encoder)
0x00002000);
vlv_dpio_write(dev_priv, DPIO_TX_OCALINIT(port),
DPIO_TX_OCALINIT_EN);
- mutex_lock(&dev_priv->dpio_lock);
+ mutex_unlock(&dev_priv->dpio_lock);
}
static void intel_hdmi_post_disable(struct intel_encoder *encoder)
Cheers, Daniel
On Mon, Aug 5, 2013 at 11:47 AM, Dan Carpenter <dan.carpen...@oracle.com> wrote:
Hi Chris,
FYI, there are coccinelle warnings in
tree: git://people.freedesktop.org/~danvet/drm-intel.git drm-intel-nightly
head: ae8f8cd50423690c4970cab6c27d4b983c12636f
commit: 2f5baa2f10f31ad0ba9bfe9993fc1691eb624f2e [20/35] drm/i915: Acquire
dpio_lock for VLV sideband programming in DP/HDMI
drivers/gpu/drm/i915/intel_hdmi.c:1067:1-11: second lock on line 1086
git remote add drm-intel git://people.freedesktop.org/~danvet/drm-intel.git
git remote update drm-intel
git checkout 2f5baa2f10f31ad0ba9bfe9993fc1691eb624f2e
vim +1067 drivers/gpu/drm/i915/intel_hdmi.c
89b667f8 Jesse Barnes 2013-04-18 1061 int port =
vlv_dport_to_channel(dport);
89b667f8 Jesse Barnes 2013-04-18 1062
89b667f8 Jesse Barnes 2013-04-18 1063 if (!IS_VALLEYVIEW(dev))
89b667f8 Jesse Barnes 2013-04-18 1064 return;
89b667f8 Jesse Barnes 2013-04-18 1065
89b667f8 Jesse Barnes 2013-04-18 1066 /* Program Tx lane resets to
default */
2f5baa2f Chris Wilson 2013-07-26 @1067
mutex_lock(&dev_priv->dpio_lock);
ae99258f Jani Nikula 2013-05-22 1068 vlv_dpio_write(dev_priv,
DPIO_PCS_TX(port),
89b667f8 Jesse Barnes 2013-04-18 1069
DPIO_PCS_TX_LANE2_RESET |
89b667f8 Jesse Barnes 2013-04-18 1070
DPIO_PCS_TX_LANE1_RESET);
ae99258f Jani Nikula 2013-05-22 1071 vlv_dpio_write(dev_priv,
DPIO_PCS_CLK(port),
89b667f8 Jesse Barnes 2013-04-18 1072
DPIO_PCS_CLK_CRI_RXEB_EIOS_EN |
89b667f8 Jesse Barnes 2013-04-18 1073
DPIO_PCS_CLK_CRI_RXDIGFILTSG_EN |
89b667f8 Jesse Barnes 2013-04-18 1074
(1<<DPIO_PCS_CLK_DATAWIDTH_SHIFT) |
89b667f8 Jesse Barnes 2013-04-18 1075
DPIO_PCS_CLK_SOFT_RESET);
89b667f8 Jesse Barnes 2013-04-18 1076
89b667f8 Jesse Barnes 2013-04-18 1077 /* Fix up inter-pair skew
failure */
ae99258f Jani Nikula 2013-05-22 1078 vlv_dpio_write(dev_priv,
DPIO_PCS_STAGGER1(port), 0x00750f00);
ae99258f Jani Nikula 2013-05-22 1079 vlv_dpio_write(dev_priv,
DPIO_TX_CTL(port), 0x00001500);
ae99258f Jani Nikula 2013-05-22 1080 vlv_dpio_write(dev_priv,
DPIO_TX_LANE(port), 0x40400000);
89b667f8 Jesse Barnes 2013-04-18 1081
ae99258f Jani Nikula 2013-05-22 1082 vlv_dpio_write(dev_priv,
DPIO_PCS_CTL_OVER1(port),
89b667f8 Jesse Barnes 2013-04-18 1083 0x00002000);
ae99258f Jani Nikula 2013-05-22 1084 vlv_dpio_write(dev_priv,
DPIO_TX_OCALINIT(port),
89b667f8 Jesse Barnes 2013-04-18 1085
DPIO_TX_OCALINIT_EN);
2f5baa2f Chris Wilson 2013-07-26 @1086
mutex_lock(&dev_priv->dpio_lock);
89b667f8 Jesse Barnes 2013-04-18 1087 }
89b667f8 Jesse Barnes 2013-04-18 1088
89b667f8 Jesse Barnes 2013-04-18 1089 static void
intel_hdmi_post_disable(struct intel_encoder *encoder)
---
0-DAY kernel build testing backend Open Source Technology Center
http://lists.01.org/mailman/listinfo/kbuild Intel Corporation
_______________________________________________
kbuild mailing list
kbu...@lists.01.org
https://lists.01.org/mailman/listinfo/kbuild
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
