From: Ville Syrjälä <[email protected]> Extract a small helper to populate a ddb entry.
Signed-off-by: Ville Syrjälä <[email protected]> --- drivers/gpu/drm/i915/intel_pm.c | 48 +++++++++++++++++---------------- 1 file changed, 25 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index be8eacac8e62..2b14f23759ec 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4017,6 +4017,15 @@ static int intel_compute_sagv_mask(struct intel_atomic_state *state) return 0; } +static u16 skl_ddb_entry_init(struct skl_ddb_entry *entry, + u16 start, u16 end) +{ + entry->start = start; + entry->end = end; + + return end; +} + /* * Calculate initial DBuf slice offset, based on slice size * and mask(i.e if slice size is 1024 and second slice is enabled @@ -4110,8 +4119,8 @@ skl_ddb_get_pipe_allocation_limits(struct drm_i915_private *dev_priv, *num_active = hweight8(active_pipes); if (!crtc_state->hw.active) { - alloc->start = 0; - alloc->end = 0; + skl_ddb_entry_init(alloc, 0, 0); + return 0; } @@ -4223,8 +4232,7 @@ skl_ddb_get_pipe_allocation_limits(struct drm_i915_private *dev_priv, end = ddb_range_size * (width_before_pipe_in_range + pipe_width) / total_width_in_range; - alloc->start = offset + start; - alloc->end = offset + end; + skl_ddb_entry_init(alloc, offset + start, offset + end); drm_dbg_kms(&dev_priv->drm, "[CRTC:%d:%s] dbuf slices 0x%x, ddb (%d - %d), active pipes 0x%x\n", @@ -4278,12 +4286,10 @@ skl_cursor_allocation(const struct intel_crtc_state *crtc_state, static void skl_ddb_entry_init_from_hw(struct skl_ddb_entry *entry, u32 reg) { - - entry->start = reg & DDB_ENTRY_MASK; - entry->end = (reg >> DDB_ENTRY_END_SHIFT) & DDB_ENTRY_MASK; - + skl_ddb_entry_init(entry, reg & DDB_ENTRY_MASK, + (reg >> DDB_ENTRY_END_SHIFT) & DDB_ENTRY_MASK); if (entry->end) - entry->end += 1; + entry->end++; } static void @@ -4842,7 +4848,8 @@ skl_allocate_pipe_ddb(struct intel_atomic_state *state, } } - alloc->start = alloc->end = 0; + skl_ddb_entry_init(alloc, 0, 0); + return 0; } @@ -4865,9 +4872,8 @@ skl_allocate_pipe_ddb(struct intel_atomic_state *state, /* Allocate fixed number of blocks for cursor. */ total[PLANE_CURSOR] = skl_cursor_allocation(crtc_state, num_active); alloc_size -= total[PLANE_CURSOR]; - crtc_state->wm.skl.plane_ddb_y[PLANE_CURSOR].start = - alloc->end - total[PLANE_CURSOR]; - crtc_state->wm.skl.plane_ddb_y[PLANE_CURSOR].end = alloc->end; + skl_ddb_entry_init(&crtc_state->wm.skl.plane_ddb_y[PLANE_CURSOR], + alloc->end - total[PLANE_CURSOR], alloc->end); if (total_data_rate == 0) return 0; @@ -4968,17 +4974,13 @@ skl_allocate_pipe_ddb(struct intel_atomic_state *state, INTEL_GEN(dev_priv) >= 11 && uv_total[plane_id]); /* Leave disabled planes at (0,0) */ - if (total[plane_id]) { - plane_alloc->start = start; - start += total[plane_id]; - plane_alloc->end = start; - } + if (total[plane_id]) + start = skl_ddb_entry_init(plane_alloc, start, + start + total[plane_id]); - if (uv_total[plane_id]) { - uv_plane_alloc->start = start; - start += uv_total[plane_id]; - uv_plane_alloc->end = start; - } + if (uv_total[plane_id]) + start = skl_ddb_entry_init(uv_plane_alloc, start, + start + uv_total[plane_id]); } /* -- 2.26.2 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
