Could u please add the change details in patch as below v3: Chnage in API intel_pxp_gem_object_status()
On 2020-12-06 at 16:21:34 -0800, Huang, Sean Z wrote: > From: Anshuman Gupta <[email protected]> > > Add support to enable/disable PLANE_SURF Decryption Request bit. > It requires only to enable plane decryption support when following > condition met. > 1. PAVP session is enabled. for uniformity PAVP -> pxp here too. Thanks, Anshuman Gupta. > 2. Buffer object is protected. > > v2: > - Rebased to libva_cp-drm-tip_tgl_cp tree. > - Used gen fb obj user_flags instead gem_object_metadata. [Krishna] > > Cc: Bommu Krishnaiah <[email protected]> > Cc: Huang, Sean Z <[email protected]> > Signed-off-by: Anshuman Gupta <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_sprite.c | 21 ++++++++++++++++++--- > drivers/gpu/drm/i915/i915_reg.h | 1 + > 2 files changed, 19 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c > b/drivers/gpu/drm/i915/display/intel_sprite.c > index 019a2d6d807a..158c8dea0930 100644 > --- a/drivers/gpu/drm/i915/display/intel_sprite.c > +++ b/drivers/gpu/drm/i915/display/intel_sprite.c > @@ -39,6 +39,8 @@ > #include <drm/drm_plane_helper.h> > #include <drm/drm_rect.h> > > +#include "pxp/intel_pxp.h" > + > #include "i915_drv.h" > #include "i915_trace.h" > #include "i915_vgpu.h" > @@ -752,6 +754,11 @@ icl_program_input_csc(struct intel_plane *plane, > PLANE_INPUT_CSC_POSTOFF(pipe, plane_id, 2), 0x0); > } > > +static bool intel_fb_obj_protected(const struct drm_i915_gem_object *obj) > +{ > + return obj->user_flags & I915_BO_PROTECTED ? true : false; > +} > + > static void > skl_plane_async_flip(struct intel_plane *plane, > const struct intel_crtc_state *crtc_state, > @@ -788,6 +795,7 @@ skl_program_plane(struct intel_plane *plane, > u32 surf_addr = plane_state->color_plane[color_plane].offset; > u32 stride = skl_plane_stride(plane_state, color_plane); > const struct drm_framebuffer *fb = plane_state->hw.fb; > + const struct drm_i915_gem_object *obj = intel_fb_obj(fb); > int aux_plane = intel_main_to_aux_plane(fb, color_plane); > int crtc_x = plane_state->uapi.dst.x1; > int crtc_y = plane_state->uapi.dst.y1; > @@ -798,7 +806,7 @@ skl_program_plane(struct intel_plane *plane, > u8 alpha = plane_state->hw.alpha >> 8; > u32 plane_color_ctl = 0, aux_dist = 0; > unsigned long irqflags; > - u32 keymsk, keymax; > + u32 keymsk, keymax, plane_surf; > u32 plane_ctl = plane_state->ctl; > > plane_ctl |= skl_plane_ctl_crtc(crtc_state); > @@ -874,8 +882,15 @@ skl_program_plane(struct intel_plane *plane, > * the control register just before the surface register. > */ > intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), plane_ctl); > - intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id), > - intel_plane_ggtt_offset(plane_state) + surf_addr); > + plane_surf = intel_plane_ggtt_offset(plane_state) + surf_addr; > + > + if (intel_pxp_gem_object_status(dev_priv) && > + intel_fb_obj_protected(obj)) > + plane_surf |= PLANE_SURF_DECRYPTION_ENABLED; > + else > + plane_surf &= ~PLANE_SURF_DECRYPTION_ENABLED; > + > + intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id), plane_surf); > > if (plane_state->scaler_id >= 0) > skl_program_scaler(plane, crtc_state, plane_state); > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index c3b9ca142539..ebb66fbab7d9 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -7208,6 +7208,7 @@ enum { > #define _PLANE_SURF_3(pipe) _PIPE(pipe, _PLANE_SURF_3_A, _PLANE_SURF_3_B) > #define PLANE_SURF(pipe, plane) \ > _MMIO_PLANE(plane, _PLANE_SURF_1(pipe), _PLANE_SURF_2(pipe)) > +#define PLANE_SURF_DECRYPTION_ENABLED REG_BIT(2) > > #define _PLANE_OFFSET_1_B 0x711a4 > #define _PLANE_OFFSET_2_B 0x712a4 > -- > 2.17.1 > _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
