On Fri, Feb 26, 2021 at 05:32:04PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrj...@linux.intel.com>
>
> Get rid of the nonsense cursor special case in verify_wm_state()
> by just iterating through all the planes. And let's use the
> canonical [PLANE:..] style in the debug prints while at it.
Great move!
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovs...@intel.com>
>
> Cc: Stanislav Lisovskiy <stanislav.lisovs...@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 88 ++++----------------
> drivers/gpu/drm/i915/display/intel_display.h | 5 --
> 2 files changed, 17 insertions(+), 76 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index e2ef31a93407..e0ecd8eea68d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -9348,11 +9348,10 @@ static void verify_wm_state(struct intel_crtc *crtc,
> struct skl_ddb_entry ddb_uv[I915_MAX_PLANES];
> struct skl_pipe_wm wm;
> } *hw;
> - struct skl_pipe_wm *sw_wm;
> - struct skl_ddb_entry *hw_ddb_entry, *sw_ddb_entry;
> + const struct skl_pipe_wm *sw_wm = &new_crtc_state->wm.skl.optimal;
> + int level, max_level = ilk_wm_max_level(dev_priv);
> + struct intel_plane *plane;
> u8 hw_enabled_slices;
> - const enum pipe pipe = crtc->pipe;
> - int plane, level, max_level = ilk_wm_max_level(dev_priv);
>
> if (INTEL_GEN(dev_priv) < 9 || !new_crtc_state->hw.active)
> return;
> @@ -9362,7 +9361,6 @@ static void verify_wm_state(struct intel_crtc *crtc,
> return;
>
> skl_pipe_wm_get_hw_state(crtc, &hw->wm);
> - sw_wm = &new_crtc_state->wm.skl.optimal;
>
> skl_pipe_ddb_get_hw_state(crtc, hw->ddb_y, hw->ddb_uv);
>
> @@ -9375,21 +9373,21 @@ static void verify_wm_state(struct intel_crtc *crtc,
> dev_priv->dbuf.enabled_slices,
> hw_enabled_slices);
>
> - /* planes */
> - for_each_universal_plane(dev_priv, pipe, plane) {
> + for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) {
> + const struct skl_ddb_entry *hw_ddb_entry, *sw_ddb_entry;
> const struct skl_wm_level *hw_wm_level, *sw_wm_level;
>
> /* Watermarks */
> for (level = 0; level <= max_level; level++) {
> - hw_wm_level = &hw->wm.planes[plane].wm[level];
> - sw_wm_level = skl_plane_wm_level(sw_wm, plane, level);
> + hw_wm_level = &hw->wm.planes[plane->id].wm[level];
> + sw_wm_level = skl_plane_wm_level(sw_wm, plane->id,
> level);
>
> if (skl_wm_level_equals(hw_wm_level, sw_wm_level))
> continue;
>
> drm_err(&dev_priv->drm,
> - "mismatch in WM pipe %c plane %d level %d
> (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
> - pipe_name(pipe), plane + 1, level,
> + "[PLANE:%d:%s] mismatch in WM%d (expected e=%d
> b=%u l=%u, got e=%d b=%u l=%u)\n",
> + plane->base.base.id, plane->base.name, level,
> sw_wm_level->plane_en,
> sw_wm_level->plane_res_b,
> sw_wm_level->plane_res_l,
> @@ -9398,13 +9396,13 @@ static void verify_wm_state(struct intel_crtc *crtc,
> hw_wm_level->plane_res_l);
> }
>
> - hw_wm_level = &hw->wm.planes[plane].trans_wm;
> - sw_wm_level = skl_plane_trans_wm(sw_wm, plane);
> + hw_wm_level = &hw->wm.planes[plane->id].trans_wm;
> + sw_wm_level = skl_plane_trans_wm(sw_wm, plane->id);
>
> if (!skl_wm_level_equals(hw_wm_level, sw_wm_level)) {
> drm_err(&dev_priv->drm,
> - "mismatch in trans WM pipe %c plane %d
> (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
> - pipe_name(pipe), plane + 1,
> + "[PLANE:%d:%s] mismatch in trans WM (expected
> e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
> + plane->base.base.id, plane->base.name,
> sw_wm_level->plane_en,
> sw_wm_level->plane_res_b,
> sw_wm_level->plane_res_l,
> @@ -9414,65 +9412,13 @@ static void verify_wm_state(struct intel_crtc *crtc,
> }
>
> /* DDB */
> - hw_ddb_entry = &hw->ddb_y[plane];
> - sw_ddb_entry = &new_crtc_state->wm.skl.plane_ddb_y[plane];
> + hw_ddb_entry = &hw->ddb_y[plane->id];
> + sw_ddb_entry = &new_crtc_state->wm.skl.plane_ddb_y[plane->id];
>
> if (!skl_ddb_entry_equal(hw_ddb_entry, sw_ddb_entry)) {
> drm_err(&dev_priv->drm,
> - "mismatch in DDB state pipe %c plane %d
> (expected (%u,%u), found (%u,%u))\n",
> - pipe_name(pipe), plane + 1,
> - sw_ddb_entry->start, sw_ddb_entry->end,
> - hw_ddb_entry->start, hw_ddb_entry->end);
> - }
> - }
> -
> - /*
> - * cursor
> - * If the cursor plane isn't active, we may not have updated it's ddb
> - * allocation. In that case since the ddb allocation will be updated
> - * once the plane becomes visible, we can skip this check
> - */
> - if (1) {
> - const struct skl_wm_level *hw_wm_level, *sw_wm_level;
> -
> - /* Watermarks */
> - for (level = 0; level <= max_level; level++) {
> - hw_wm_level = &hw->wm.planes[PLANE_CURSOR].wm[level];
> - sw_wm_level = skl_plane_wm_level(sw_wm, PLANE_CURSOR,
> level);
> - drm_err(&dev_priv->drm,
> - "mismatch in WM pipe %c cursor level %d
> (expected e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
> - pipe_name(pipe), level,
> - sw_wm_level->plane_en,
> - sw_wm_level->plane_res_b,
> - sw_wm_level->plane_res_l,
> - hw_wm_level->plane_en,
> - hw_wm_level->plane_res_b,
> - hw_wm_level->plane_res_l);
> - }
> -
> - hw_wm_level = &hw->wm.planes[PLANE_CURSOR].trans_wm;
> - sw_wm_level = skl_plane_trans_wm(sw_wm, PLANE_CURSOR);
> -
> - if (!skl_wm_level_equals(hw_wm_level, sw_wm_level)) {
> - drm_err(&dev_priv->drm,
> - "mismatch in trans WM pipe %c cursor (expected
> e=%d b=%u l=%u, got e=%d b=%u l=%u)\n",
> - pipe_name(pipe),
> - sw_wm_level->plane_en,
> - sw_wm_level->plane_res_b,
> - sw_wm_level->plane_res_l,
> - hw_wm_level->plane_en,
> - hw_wm_level->plane_res_b,
> - hw_wm_level->plane_res_l);
> - }
> -
> - /* DDB */
> - hw_ddb_entry = &hw->ddb_y[PLANE_CURSOR];
> - sw_ddb_entry =
> &new_crtc_state->wm.skl.plane_ddb_y[PLANE_CURSOR];
> -
> - if (!skl_ddb_entry_equal(hw_ddb_entry, sw_ddb_entry)) {
> - drm_err(&dev_priv->drm,
> - "mismatch in DDB state pipe %c cursor (expected
> (%u,%u), found (%u,%u))\n",
> - pipe_name(pipe),
> + "[PLANE:%d:%s] mismatch in DDB (expected
> (%u,%u), found (%u,%u))\n",
> + plane->base.base.id, plane->base.name,
> sw_ddb_entry->start, sw_ddb_entry->end,
> hw_ddb_entry->start, hw_ddb_entry->end);
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> b/drivers/gpu/drm/i915/display/intel_display.h
> index 61080152319f..216047233a6d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -353,11 +353,6 @@ enum phy_fia {
> for_each_cpu_transcoder(__dev_priv, __t) \
> for_each_if ((__mask) & BIT(__t))
>
> -#define for_each_universal_plane(__dev_priv, __pipe, __p) \
> - for ((__p) = 0; \
> - (__p) < RUNTIME_INFO(__dev_priv)->num_sprites[(__pipe)] + 1;
> \
> - (__p)++)
> -
> #define for_each_sprite(__dev_priv, __p, __s)
> \
> for ((__s) = 0; \
> (__s) < RUNTIME_INFO(__dev_priv)->num_sprites[(__p)]; \
> --
> 2.26.2
>
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