On Thu, 2021-04-01 at 20:02 +0300, Gwan-gyeong Mun wrote:
> Due to the changed sequence of activating/deactivating DC3CO, disable
> DC3CO until the changed dc3co activating/deactivating sequence is applied.

Reviewed-by: José Roberto de Souza <jose.so...@intel.com>

> 
> References: https://gitlab.freedesktop.org/drm/intel/-/issues/3134
> Signed-off-by: Gwan-gyeong Mun <gwan-gyeong....@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 1d561812fcad..32d3d56259c2 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -654,6 +654,13 @@ tgl_dc3co_exitline_compute_config(struct intel_dp 
> *intel_dp,
>       struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>       u32 exit_scanlines;
>  
> 
> 
> 
> +     /*
> +      * FIXME: Due to the changed sequence of activating/deactivating DC3CO,
> +      * disable DC3CO until the changed dc3co activating/deactivating 
> sequence
> +      * is applied. B.Specs:49196
> +      */
> +     return;
> +
>       /*
>        * DMC's DC3CO exit mechanism has an issue with Selective Fecth
>        * TODO: when the issue is addressed, this restriction should be 
> removed.

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