An async-put on an encoder specific power domain (for instance the AUX PW domain) may be pending when removing the encoder. Make sure any such async-puts are complete while the corresponding encoder is still in place since at least AUX power wells require this to do a power well->PHY lookup.
Signed-off-by: Imre Deak <[email protected]> --- drivers/gpu/drm/i915/display/intel_ddi.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 3d89186741539..d0d11c9c8d13b 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -4063,9 +4063,11 @@ static int intel_ddi_compute_config_late(struct intel_encoder *encoder, static void intel_ddi_encoder_destroy(struct drm_encoder *encoder) { + struct drm_i915_private *i915 = to_i915(encoder->dev); struct intel_digital_port *dig_port = enc_to_dig_port(to_intel_encoder(encoder)); intel_dp_encoder_flush_work(encoder); + intel_display_power_flush_work(i915); drm_encoder_cleanup(encoder); if (dig_port) -- 2.27.0 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
