Haswell changed the log registers to be WO, so we can no longer read them to determine the programming (which sucks, see later note). For now, simply use the cached value, and hope HW doesn't screw us over.
v2: Simplify the logic to avoid an extra !, remove last, and fix the buffer offset which broke along the rebase (Ville) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57441 CC: Ville Syrjälä <[email protected]> Signed-off-by: Ben Widawsky <[email protected]> --- drivers/gpu/drm/i915/i915_sysfs.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c index d572435..71f6de2 100644 --- a/drivers/gpu/drm/i915/i915_sysfs.c +++ b/drivers/gpu/drm/i915/i915_sysfs.c @@ -133,6 +133,17 @@ i915_l3_read(struct file *filp, struct kobject *kobj, if (ret) return ret; + if (IS_HASWELL(drm_dev)) { + if (dev_priv->l3_parity.remap_info) + memcpy(buf, + dev_priv->l3_parity.remap_info + (offset/4), + count); + else + memset(buf, 0, count); + + goto out; + } + misccpctl = I915_READ(GEN7_MISCCPCTL); I915_WRITE(GEN7_MISCCPCTL, misccpctl & ~GEN7_DOP_CLOCK_GATE_ENABLE); @@ -141,9 +152,10 @@ i915_l3_read(struct file *filp, struct kobject *kobj, I915_WRITE(GEN7_MISCCPCTL, misccpctl); +out: mutex_unlock(&drm_dev->struct_mutex); - return i; + return count; } static ssize_t -- 1.8.4 _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
