On Fri, Oct 04, 2013 at 09:22:55PM -0700, Ben Widawsky wrote:
> Now that MMIO has been split up into gen specific functions it is
> obvious when HAS_FPGA_DBG_UNCLAIMED, HAS_FORCE_WAKE are needed.
>
> I'm a bit on the fence whether or not to even have the checks at all.
> For now I am leaving them there because I think they are valuable for
> debug, and early silicon bringup. In these cases, one could hardcode the
> appropriate values, and not have forcewake, and fpga_dbg.
>
> Signed-off-by: Ben Widawsky <[email protected]>
Can't we just completely fold away the gen/platform checks now?
-Daniel
> ---
> drivers/gpu/drm/i915/intel_uncore.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c
> b/drivers/gpu/drm/i915/intel_uncore.c
> index cd56212..30fbee0 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -307,7 +307,7 @@ void gen6_gt_force_wake_put(struct drm_i915_private
> *dev_priv)
>
> /* We give fast paths for the really cool registers */
> #define NEEDS_FORCE_WAKE(dev_priv, reg) \
> - ((HAS_FORCE_WAKE((dev_priv)->dev)) && \
> + ((likely(HAS_FORCE_WAKE((dev_priv)->dev))) && \
> ((reg) < 0x40000) && \
> ((reg) != FORCEWAKE))
>
> @@ -323,7 +323,7 @@ ilk_dummy_write(struct drm_i915_private *dev_priv)
> static void
> hsw_unclaimed_reg_clear(struct drm_i915_private *dev_priv, u32 reg)
> {
> - if (HAS_FPGA_DBG_UNCLAIMED(dev_priv->dev) &&
> + if (likely(HAS_FPGA_DBG_UNCLAIMED(dev_priv->dev)) &&
> (__raw_i915_read32(dev_priv, FPGA_DBG) & FPGA_DBG_RM_NOCLAIM)) {
> DRM_ERROR("Unknown unclaimed register before writing to %x\n",
> reg);
> @@ -334,7 +334,7 @@ hsw_unclaimed_reg_clear(struct drm_i915_private
> *dev_priv, u32 reg)
> static void
> hsw_unclaimed_reg_check(struct drm_i915_private *dev_priv, u32 reg)
> {
> - if (HAS_FPGA_DBG_UNCLAIMED(dev_priv->dev) &&
> + if (likely(HAS_FPGA_DBG_UNCLAIMED(dev_priv->dev)) &&
> (__raw_i915_read32(dev_priv, FPGA_DBG) & FPGA_DBG_RM_NOCLAIM)) {
> DRM_ERROR("Unclaimed write to %x\n", reg);
> __raw_i915_write32(dev_priv, FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
> --
> 1.8.4
>
> _______________________________________________
> Intel-gfx mailing list
> [email protected]
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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