> -----Original Message----- > From: Intel-gfx <[email protected]> On Behalf Of Ville > Syrjala > Sent: Wednesday, November 24, 2021 1:37 PM > To: [email protected] > Subject: [Intel-gfx] [PATCH 01/20] drm/i915/fbc: Eliminate racy > intel_fbc_is_active() usage > > From: Ville Syrjälä <[email protected]> > > The ilk fbc watermark computation uses intel_fbc_is_active() which is racy > since > we don't know whether FBC will be enabled or not at some point. So let's just > assume it will be if both HAS_FBC() and the modparam agree. > > Signed-off-by: Ville Syrjälä <[email protected]>
Reviewed-by: Mika Kahola <[email protected]> > --- > drivers/gpu/drm/i915/intel_pm.c | 9 ++------- > 1 file changed, 2 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 01fa3fac1b57..18fbdd204a93 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -3369,13 +3369,8 @@ static void ilk_wm_merge(struct drm_i915_private > *dev_priv, > } > > /* ILK: LP2+ must be disabled when FBC WM is disabled but FBC enabled > */ > - /* > - * FIXME this is racy. FBC might get enabled later. > - * What we should check here is whether FBC can be > - * enabled sometime later. > - */ > - if (DISPLAY_VER(dev_priv) == 5 && !merged->fbc_wm_enabled && > - intel_fbc_is_active(&dev_priv->fbc)) { > + if (DISPLAY_VER(dev_priv) == 5 && HAS_FBC(dev_priv) && > + dev_priv->params.enable_fbc && !merged->fbc_wm_enabled) { > for (level = 2; level <= max_level; level++) { > struct intel_wm_level *wm = &merged->wm[level]; > > -- > 2.32.0
