> -----Original Message-----
> From: Intel-gfx <intel-gfx-boun...@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Wednesday, November 24, 2021 1:37 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 15/20] drm/i915/fbc: Disable FBC fully on FIFO
> underrun
>
> From: Ville Syrjälä <ville.syrj...@linux.intel.com>
>
> Currently a FIFO underrun just causes FBC to be deactivated, and later checks
> then prevent it from being reactivated. We can simpify our lives a bit by
> logically
> disabling FBC on FIFO underruna. This avoids the funny intermediate state
> where
> FBC is logically enabled but can't actually be activated.
>
> Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
Reviewed-by: Mika Kahola <mika.kah...@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_fbc.c | 29 +++++++-----------------
> 1 file changed, 8 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 616ab95766b2..74ba54d70e57 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -994,16 +994,6 @@ static bool intel_fbc_cfb_size_changed(struct intel_fbc
> *fbc)
> return fbc->state_cache.cfb_size > fbc->compressed_fb.size * fbc-
> >limit; }
>
> -static bool intel_fbc_can_enable(struct intel_fbc *fbc) -{
> - if (fbc->underrun_detected) {
> - fbc->no_fbc_reason = "underrun detected";
> - return false;
> - }
> -
> - return true;
> -}
> -
> static int intel_fbc_check_plane(struct intel_atomic_state *state,
> struct intel_plane *plane)
> {
> @@ -1123,22 +1113,11 @@ static bool intel_fbc_can_activate(struct intel_fbc
> *fbc)
> struct drm_i915_private *i915 = fbc->i915;
> struct intel_fbc_state *cache = &fbc->state_cache;
>
> - if (!intel_fbc_can_enable(fbc))
> - return false;
> -
> if (cache->no_fbc_reason) {
> fbc->no_fbc_reason = cache->no_fbc_reason;
> return false;
> }
>
> - /* We don't need to use a state cache here since this information is
> - * global for all CRTC.
> - */
> - if (fbc->underrun_detected) {
> - fbc->no_fbc_reason = "underrun detected";
> - return false;
> - }
> -
> /* The use of a CPU fence is one of two ways to detect writes by the
> * CPU to the scanout and trigger updates to the FBC.
> *
> @@ -1467,6 +1446,11 @@ static void __intel_fbc_enable(struct
> intel_atomic_state *state,
> if (cache->no_fbc_reason)
> return;
>
> + if (fbc->underrun_detected) {
> + fbc->no_fbc_reason = "FIFO underrun";
> + return;
> + }
> +
> if (intel_fbc_alloc_cfb(fbc, intel_fbc_cfb_size(plane_state),
> min_limit)) {
> fbc->no_fbc_reason = "not enough stolen memory";
> return;
> @@ -1567,6 +1551,9 @@ static void intel_fbc_underrun_work_fn(struct
> work_struct *work)
> fbc->underrun_detected = true;
>
> intel_fbc_deactivate(fbc, "FIFO underrun");
> + if (!fbc->flip_pending)
> + intel_wait_for_vblank(i915, fbc->plane->pipe);
> + __intel_fbc_disable(fbc);
> out:
> mutex_unlock(&fbc->lock);
> }
> --
> 2.32.0
