On Mon, Oct 21, 2013 at 01:50:03PM +0300, Ville Syrjälä wrote: > On Wed, Oct 16, 2013 at 10:55:57PM +0200, Daniel Vetter wrote: > > The PIPE_B #define was missing the display mmio offset. Use the > > _PIPE_INC macro instead, it's simpler. > > > > Signed-off-by: Daniel Vetter <[email protected]> > > --- > > drivers/gpu/drm/i915/i915_reg.h | 3 +-- > > 1 file changed, 1 insertion(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h > > b/drivers/gpu/drm/i915/i915_reg.h > > index ad8fe21..4e0f0b7 100644 > > --- a/drivers/gpu/drm/i915/i915_reg.h > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > @@ -1887,14 +1887,13 @@ > > #define _PIPE_CRC_RES_RES2_A_G4X (dev_priv->info->display_mmio_offset + > > 0x60080) > > > > /* Pipe B CRC regs */ > > -#define _PIPE_CRC_CTL_B 0x61050 > > #define _PIPE_CRC_RES_1_B_IVB 0x61064 > > #define _PIPE_CRC_RES_2_B_IVB 0x61068 > > #define _PIPE_CRC_RES_3_B_IVB 0x6106c > > #define _PIPE_CRC_RES_4_B_IVB 0x61070 > > #define _PIPE_CRC_RES_5_B_IVB 0x61074 > > Maybe use _PIPE_INC() for these IVB regs as well. They're the only CRC > regs left using _PIPE(), so they feel a bit out of place.
The _PIPE_INC stuff is essentially just a "throw stuff at the wall and see whether it sticks" test. The idea is that with the doc rework registers for new platforms are already tightly grouped, so the base+increment is easier to review. If people like it we could do a mass conversion (and decently cut down the size of i915_reg.h). That would also help to make the odd cases like vlv+1 stick out more. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
