On Tue, 2022-03-15 at 15:27 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrj...@linux.intel.com>
>
> With static DRRS the user might ask for the lowest possible refresh
> rate of the panel, in which case we're not going to find a suitable
> downclock mode for it and we should not try to enable seamless DRRS.
> This will in fact oops.
>
> We used to check for the presence of the downclock mode here, but
> that got removed in commit f0a57798fb5c ("drm/i915: Introduce
> intel_panel_drrs_type()") as redundant (which it was at the time).
> But we do need the check again now that static DRRS is a thing.
>
> I must have not re-tested static DRRS fully after introducing
> intel_panel_drrs_type() :/
Reviewed-by: José Roberto de Souza <jose.so...@intel.com>
>
> Fixes: c5ee23437cae ("drm/i915: Implement static DRRS")
> Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_drrs.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c
> b/drivers/gpu/drm/i915/display/intel_drrs.c
> index 2bbc0388263a..e1b41b772521 100644
> --- a/drivers/gpu/drm/i915/display/intel_drrs.c
> +++ b/drivers/gpu/drm/i915/display/intel_drrs.c
> @@ -62,7 +62,8 @@ const char *intel_drrs_type_str(enum drrs_type drrs_type)
> }
>
> static bool can_enable_drrs(struct intel_connector *connector,
> - const struct intel_crtc_state *pipe_config)
> + const struct intel_crtc_state *pipe_config,
> + const struct drm_display_mode *downclock_mode)
> {
> if (pipe_config->vrr.enable)
> return false;
> @@ -76,7 +77,8 @@ static bool can_enable_drrs(struct intel_connector
> *connector,
> if (pipe_config->has_psr)
> return false;
>
> - return intel_panel_drrs_type(connector) == DRRS_TYPE_SEAMLESS;
> + return downclock_mode &&
> + intel_panel_drrs_type(connector) == DRRS_TYPE_SEAMLESS;
> }
>
> void
> @@ -89,7 +91,7 @@ intel_drrs_compute_config(struct intel_connector *connector,
> intel_panel_downclock_mode(connector,
> &pipe_config->hw.adjusted_mode);
> int pixel_clock;
>
> - if (!can_enable_drrs(connector, pipe_config)) {
> + if (!can_enable_drrs(connector, pipe_config, downclock_mode)) {
> if (intel_cpu_transcoder_has_m2_n2(i915,
> pipe_config->cpu_transcoder))
> intel_zero_m_n(&pipe_config->dp_m2_n2);
> return;
