Some upcoming platforms with power wells don't have this register, so check for Haswell instead.
Signed-off-by: Imre Deak <[email protected]> --- drivers/gpu/drm/i915/intel_display.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 8f40ae3..929ecce 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -11101,7 +11101,7 @@ intel_display_capture_error_state(struct drm_device *dev) if (error == NULL) return NULL; - if (HAS_POWER_WELL(dev)) + if (IS_HASWELL(dev)) error->power_well_driver = I915_READ(HSW_PWR_WELL_DRIVER); for_each_pipe(i) { @@ -11171,7 +11171,7 @@ intel_display_print_error_state(struct drm_i915_error_state_buf *m, return; err_printf(m, "Num Pipes: %d\n", INTEL_INFO(dev)->num_pipes); - if (HAS_POWER_WELL(dev)) + if (IS_HASWELL(dev)) err_printf(m, "PWR_WELL_CTL2: %08x\n", error->power_well_driver); for_each_pipe(i) { -- 1.8.4 _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
