On Thu, 31 Mar 2022, Ville Syrjala <[email protected]> wrote: > From: Ville Syrjälä <[email protected]> > > Pull all the eDP specific platform/port checks out from > intel_drrs_init() into intel_edp_has_drrs(). > > Signed-off-by: Ville Syrjälä <[email protected]>
Whoops, forgot to reply to this one, Reviewed-by: Jani Nikula <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_dp.c | 35 ++++++++++++++++++++++- > drivers/gpu/drm/i915/display/intel_drrs.c | 24 ---------------- > 2 files changed, 34 insertions(+), 25 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index 56c36c9ef173..2c23ec0a880a 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -4976,6 +4976,39 @@ intel_edp_add_properties(struct intel_dp *intel_dp) > fixed_mode->vdisplay); > } > > +static bool > +intel_edp_has_drrs(struct intel_dp *intel_dp) > +{ > + struct intel_connector *connector = intel_dp->attached_connector; > + struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; > + struct drm_i915_private *i915 = to_i915(connector->base.dev); > + > + if (DISPLAY_VER(i915) < 5) { > + drm_dbg_kms(&i915->drm, > + "[CONNECTOR:%d:%s] DRRS not supported on > platform\n", > + connector->base.base.id, connector->base.name); > + return false; > + } > + > + if ((DISPLAY_VER(i915) < 8 && !HAS_GMCH(i915)) && > + encoder->port != PORT_A) { > + drm_dbg_kms(&i915->drm, > + "[CONNECTOR:%d:%s] DRRS not supported on > [ENCODER:%d:%s]\n", > + connector->base.base.id, connector->base.name, > + encoder->base.base.id, encoder->base.name); > + return false; > + } > + > + if (i915->vbt.drrs_type == DRRS_TYPE_NONE) { > + drm_dbg_kms(&i915->drm, > + "[CONNECTOR:%d:%s] DRRS not supported according to > VBT\n", > + connector->base.base.id, connector->base.name); > + return false; > + } > + > + return true; > +} > + > static bool intel_edp_init_connector(struct intel_dp *intel_dp, > struct intel_connector *intel_connector) > { > @@ -5041,7 +5074,7 @@ static bool intel_edp_init_connector(struct intel_dp > *intel_dp, > intel_connector->edid = edid; > > fixed_mode = intel_panel_edid_fixed_mode(intel_connector); > - if (fixed_mode) > + if (fixed_mode && intel_edp_has_drrs(intel_dp)) > downclock_mode = intel_drrs_init(intel_connector, fixed_mode); > > /* MSO requires information from the EDID */ > diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c > b/drivers/gpu/drm/i915/display/intel_drrs.c > index a5c7d58b36e0..1448c3029b8e 100644 > --- a/drivers/gpu/drm/i915/display/intel_drrs.c > +++ b/drivers/gpu/drm/i915/display/intel_drrs.c > @@ -373,32 +373,8 @@ intel_drrs_init(struct intel_connector *connector, > const struct drm_display_mode *fixed_mode) > { > struct drm_i915_private *dev_priv = to_i915(connector->base.dev); > - struct intel_encoder *encoder = connector->encoder; > struct drm_display_mode *downclock_mode; > > - if (DISPLAY_VER(dev_priv) < 5) { > - drm_dbg_kms(&dev_priv->drm, > - "[CONNECTOR:%d:%s] DRRS not supported on > platform\n", > - connector->base.base.id, connector->base.name); > - return NULL; > - } > - > - if ((DISPLAY_VER(dev_priv) < 8 && !HAS_GMCH(dev_priv)) && > - encoder->port != PORT_A) { > - drm_dbg_kms(&dev_priv->drm, > - "[CONNECTOR:%d:%s] DRRS not supported on > [ENCODER:%d:%s]\n", > - connector->base.base.id, connector->base.name, > - encoder->base.base.id, encoder->base.name); > - return NULL; > - } > - > - if (dev_priv->vbt.drrs_type == DRRS_TYPE_NONE) { > - drm_dbg_kms(&dev_priv->drm, > - "[CONNECTOR:%d:%s] DRRS not supported according to > VBT\n", > - connector->base.base.id, connector->base.name); > - return NULL; > - } > - > downclock_mode = intel_panel_edid_downclock_mode(connector, fixed_mode); > if (!downclock_mode) { > drm_dbg_kms(&dev_priv->drm, -- Jani Nikula, Intel Open Source Graphics Center
