On Tue, 03 May 2022, Ville Syrjala <ville.syrj...@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrj...@linux.intel.com>
>
> Only reassign the pipe's DPLL if it's going through a full
> .compute_config() cycle. If OTOH it's just getting modeset
> eg. in order to change cdclk there doesn't seem much point in
> picking a new DPLL for it.
>
> This should also prevent .get_dplls() from seeing a funky port_clock
> for DP even in cases where the readout produces a non-standard
> clock and we (for some reason) have decided to not fully recompute
> the state to remedy the situation.
>
> Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
A bit unsure if I can appreciate all the subtleties here, but
Reviewed-by: Jani Nikula <jani.nik...@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 17 +----------------
> drivers/gpu/drm/i915/display/intel_dpll.c | 6 ++----
> 2 files changed, 3 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 5e50e0d56088..7d488d320762 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -6955,20 +6955,6 @@ intel_crtc_update_active_timings(const struct
> intel_crtc_state *crtc_state)
> }
> }
>
> -static void intel_modeset_clear_plls(struct intel_atomic_state *state)
> -{
> - struct intel_crtc_state *new_crtc_state;
> - struct intel_crtc *crtc;
> - int i;
> -
> - for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> - if (!intel_crtc_needs_modeset(new_crtc_state))
> - continue;
> -
> - intel_release_shared_dplls(state, crtc);
> - }
> -}
> -
> /*
> * This implements the workaround described in the "notes" section of the
> mode
> * set sequence documentation. When going from no pipes or single pipe to
> @@ -7802,6 +7788,7 @@ static int intel_atomic_check(struct drm_device *dev,
> if (ret)
> goto fail;
>
> + intel_release_shared_dplls(state, crtc);
> continue;
> }
>
> @@ -7849,8 +7836,6 @@ static int intel_atomic_check(struct drm_device *dev,
> ret = intel_modeset_calc_cdclk(state);
> if (ret)
> return ret;
> -
> - intel_modeset_clear_plls(state);
> }
>
> ret = intel_atomic_check_crtcs(state);
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c
> b/drivers/gpu/drm/i915/display/intel_dpll.c
> index 2b3f72550e5a..afd30c6cc34c 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll.c
> @@ -1436,11 +1436,9 @@ int intel_dpll_crtc_get_shared_dpll(struct
> intel_atomic_state *state,
> int ret;
>
> drm_WARN_ON(&i915->drm, !intel_crtc_needs_modeset(crtc_state));
> + drm_WARN_ON(&i915->drm, !crtc_state->hw.enable &&
> crtc_state->shared_dpll);
>
> - if (drm_WARN_ON(&i915->drm, crtc_state->shared_dpll))
> - return 0;
> -
> - if (!crtc_state->hw.enable)
> + if (!crtc_state->hw.enable || crtc_state->shared_dpll)
> return 0;
>
> if (!i915->dpll_funcs->crtc_get_shared_dpll)
--
Jani Nikula, Intel Open Source Graphics Center
