On 18/07/2022 19:54, Matt Roper wrote:
On Mon, Jul 18, 2022 at 11:34:24AM -0700, Anusha Srivatsa wrote:
gen11_gu_misc_irq_handler() does not do anything tile specific.

Cc: Matt Roper <[email protected]>
Signed-off-by: Anusha Srivatsa <[email protected]>

Reviewed-by: Matt Roper <[email protected]>

---
  drivers/gpu/drm/i915/i915_irq.c | 8 ++++----
  1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 73cebc6aa650..c304af777d58 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2669,10 +2669,10 @@ gen11_gu_misc_irq_ack(struct intel_gt *gt, const u32 
master_ctl)
  }
static void
-gen11_gu_misc_irq_handler(struct intel_gt *gt, const u32 iir)
+gen11_gu_misc_irq_handler(struct drm_i915_private *i915, const u32 iir)
  {
        if (iir & GEN11_GU_MISC_GSE)
-               intel_opregion_asle_intr(gt->i915);
+               intel_opregion_asle_intr(i915);
  }
static inline u32 gen11_master_intr_disable(void __iomem * const regs)
@@ -2740,7 +2740,7 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)

Maybe this is correct but it leaves this, round about here:

        gu_misc_iir = gen11_gu_misc_irq_ack(gt, master_ctl);

So _if_ these registers are truly not per GT, or don't live in the GT block, change this one as well?

Regards,

Tvrtko

        gen11_master_intr_enable(regs);
- gen11_gu_misc_irq_handler(gt, gu_misc_iir);
+       gen11_gu_misc_irq_handler(i915, gu_misc_iir);
pmu_irq_stats(i915, IRQ_HANDLED); @@ -2805,7 +2805,7 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg) dg1_master_intr_enable(regs); - gen11_gu_misc_irq_handler(gt, gu_misc_iir);
+       gen11_gu_misc_irq_handler(i915, gu_misc_iir);
pmu_irq_stats(i915, IRQ_HANDLED); --
2.25.1


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