Customer report abnormal display output while switch eDP off sometimes.
In current display disable flow, plane will be off at first. Then turn
eDP off and disable HW pipe line. Try to turn PLANE_SURF off before
disable PLANE_CTL. No more abnormal pixel appear on eDP with this changes.

Signed-off-by: Lee Shawn C <shawn.c....@intel.com>
---
 drivers/gpu/drm/i915/display/skl_universal_plane.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c 
b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 4d6a27757065..7e7d265131b2 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -618,8 +618,8 @@ skl_plane_disable_arm(struct intel_plane *plane,
 
        skl_write_plane_wm(plane, crtc_state);
 
-       intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), 0);
        intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id), 0);
+       intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), 0);
 }
 
 static void
@@ -636,8 +636,8 @@ icl_plane_disable_arm(struct intel_plane *plane,
        skl_write_plane_wm(plane, crtc_state);
 
        intel_psr2_disable_plane_sel_fetch(plane, crtc_state);
-       intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), 0);
        intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id), 0);
+       intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), 0);
 }
 
 static bool
-- 
2.17.1

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