Follow the new direction for debugfs files, moving the details where the
implementation is. It seems quite natural intel_ipc.c is the place that
controls IPC details, even for debugfs, not intel_display_debugfs.c.

Signed-off-by: Jani Nikula <[email protected]>
---
 .../drm/i915/display/intel_display_debugfs.c  | 54 +----------------
 drivers/gpu/drm/i915/display/intel_ipc.c      | 60 +++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_ipc.h      |  1 +
 3 files changed, 62 insertions(+), 53 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c 
b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index a85e6219b403..f4e0a2b119e6 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -983,58 +983,6 @@ static int i915_shared_dplls_info(struct seq_file *m, void 
*unused)
        return 0;
 }
 
-static int i915_ipc_status_show(struct seq_file *m, void *data)
-{
-       struct drm_i915_private *dev_priv = m->private;
-
-       seq_printf(m, "Isochronous Priority Control: %s\n",
-                  str_yes_no(intel_ipc_is_enabled(dev_priv)));
-       return 0;
-}
-
-static int i915_ipc_status_open(struct inode *inode, struct file *file)
-{
-       struct drm_i915_private *dev_priv = inode->i_private;
-
-       if (!HAS_IPC(dev_priv))
-               return -ENODEV;
-
-       return single_open(file, i915_ipc_status_show, dev_priv);
-}
-
-static ssize_t i915_ipc_status_write(struct file *file, const char __user 
*ubuf,
-                                    size_t len, loff_t *offp)
-{
-       struct seq_file *m = file->private_data;
-       struct drm_i915_private *dev_priv = m->private;
-       intel_wakeref_t wakeref;
-       bool enable;
-       int ret;
-
-       ret = kstrtobool_from_user(ubuf, len, &enable);
-       if (ret < 0)
-               return ret;
-
-       with_intel_runtime_pm(&dev_priv->runtime_pm, wakeref) {
-               if (!intel_ipc_is_enabled(dev_priv) && enable)
-                       drm_info(&dev_priv->drm,
-                                "Enabling IPC: WM will be proper only after 
next commit\n");
-               dev_priv->ipc_enabled = enable;
-               intel_ipc_enable(dev_priv);
-       }
-
-       return len;
-}
-
-static const struct file_operations i915_ipc_status_fops = {
-       .owner = THIS_MODULE,
-       .open = i915_ipc_status_open,
-       .read = seq_read,
-       .llseek = seq_lseek,
-       .release = single_release,
-       .write = i915_ipc_status_write
-};
-
 static int i915_ddb_info(struct seq_file *m, void *unused)
 {
        struct drm_i915_private *dev_priv = node_to_i915(m->private);
@@ -1911,7 +1859,6 @@ static const struct {
        {"i915_dp_test_active", &i915_displayport_test_active_fops},
        {"i915_hpd_storm_ctl", &i915_hpd_storm_ctl_fops},
        {"i915_hpd_short_storm_ctl", &i915_hpd_short_storm_ctl_fops},
-       {"i915_ipc_status", &i915_ipc_status_fops},
        {"i915_drrs_ctl", &i915_drrs_ctl_fops},
        {"i915_edp_psr_debug", &i915_edp_psr_debug_fops},
 };
@@ -1935,6 +1882,7 @@ void intel_display_debugfs_register(struct 
drm_i915_private *i915)
 
        intel_dmc_debugfs_register(i915);
        intel_fbc_debugfs_register(i915);
+       intel_ipc_debugfs_register(i915);
 }
 
 static int i915_panel_show(struct seq_file *m, void *data)
diff --git a/drivers/gpu/drm/i915/display/intel_ipc.c 
b/drivers/gpu/drm/i915/display/intel_ipc.c
index 71afec42d374..389d7d8012d9 100644
--- a/drivers/gpu/drm/i915/display/intel_ipc.c
+++ b/drivers/gpu/drm/i915/display/intel_ipc.c
@@ -54,3 +54,63 @@ void intel_ipc_init(struct drm_i915_private *i915)
 
        intel_ipc_enable(i915);
 }
+
+static int intel_ipc_status_show(struct seq_file *m, void *data)
+{
+       struct drm_i915_private *i915 = m->private;
+
+       seq_printf(m, "Isochronous Priority Control: %s\n",
+                  str_yes_no(intel_ipc_is_enabled(i915)));
+       return 0;
+}
+
+static int intel_ipc_status_open(struct inode *inode, struct file *file)
+{
+       struct drm_i915_private *i915 = inode->i_private;
+
+       if (!HAS_IPC(i915))
+               return -ENODEV;
+
+       return single_open(file, intel_ipc_status_show, i915);
+}
+
+static ssize_t intel_ipc_status_write(struct file *file, const char __user 
*ubuf,
+                                     size_t len, loff_t *offp)
+{
+       struct seq_file *m = file->private_data;
+       struct drm_i915_private *i915 = m->private;
+       intel_wakeref_t wakeref;
+       bool enable;
+       int ret;
+
+       ret = kstrtobool_from_user(ubuf, len, &enable);
+       if (ret < 0)
+               return ret;
+
+       with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
+               if (!intel_ipc_is_enabled(i915) && enable)
+                       drm_info(&i915->drm,
+                                "Enabling IPC: WM will be proper only after 
next commit\n");
+               i915->ipc_enabled = enable;
+               intel_ipc_enable(i915);
+       }
+
+       return len;
+}
+
+static const struct file_operations intel_ipc_status_fops = {
+       .owner = THIS_MODULE,
+       .open = intel_ipc_status_open,
+       .read = seq_read,
+       .llseek = seq_lseek,
+       .release = single_release,
+       .write = intel_ipc_status_write
+};
+
+void intel_ipc_debugfs_register(struct drm_i915_private *i915)
+{
+       struct drm_minor *minor = i915->drm.primary;
+
+       debugfs_create_file("i915_ipc_status", 0644, minor->debugfs_root,
+                           i915, &intel_ipc_status_fops);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_ipc.h 
b/drivers/gpu/drm/i915/display/intel_ipc.h
index 1a82d8ee07da..06e23d89d249 100644
--- a/drivers/gpu/drm/i915/display/intel_ipc.h
+++ b/drivers/gpu/drm/i915/display/intel_ipc.h
@@ -13,5 +13,6 @@ struct drm_i915_private;
 void intel_ipc_init(struct drm_i915_private *i915);
 void intel_ipc_enable(struct drm_i915_private *i915);
 bool intel_ipc_is_enabled(struct drm_i915_private *i915);
+void intel_ipc_debugfs_register(struct drm_i915_private *i915);
 
 #endif /* __INTEL_IPC_H__ */
-- 
2.34.1

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