> -----Original Message----- > From: Hogander, Jouni <[email protected]> > Sent: Monday, September 5, 2022 1:24 PM > To: [email protected] > Cc: Hogander, Jouni <[email protected]>; Kahola, Mika > <[email protected]>; Souza, Jose <[email protected]> > Subject: [PATCH 2/2] drm/i915/psr: Disable PSR2 when SDP is sent on prior line > > Selective update doesn't work if SU start address is 0 and start/end SDP is > configured to be sent prior to SU start/end lines. PSR2 has to be disabled in > this > case for Alder Lake. > > HSDES: 22012279113 > > Cc: Mika Kahola <[email protected]> > Cc: José Roberto de Souza <[email protected]>
Reviewed-by: Mika Kahola <[email protected]> > Signed-off-by: Jouni Högander <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_psr.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > b/drivers/gpu/drm/i915/display/intel_psr.c > index 6f03bf16d6f4..90d7cdd743be 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -811,7 +811,8 @@ static bool > _compute_psr2_sdp_prior_scanline_indication(struct intel_dp *intel_d > if ((hblank_ns - req_ns) > 100) > return true; > > - if (DISPLAY_VER(dev_priv) < 13 || intel_dp->edp_dpcd[0] < > DP_EDP_14b) > + /* Not supported <13 / Wa_22012279113:adl-p */ > + if (DISPLAY_VER(dev_priv) <= 13 || intel_dp->edp_dpcd[0] < > DP_EDP_14b) > return false; > > crtc_state->req_psr2_sdp_prior_scanline = true; > -- > 2.34.1
