On Tue, Oct 11, 2022 at 12:04:44PM +0530, Ankit Nautiyal wrote:
> Use the new crtc_state member sink_format to check if DP DFP will use
> YCBCR420.
> The earlier intel_dp->dfp members are not required as decision to use
> color format conversion by the PCON is computed and stored in
> crtc_state. Also drop the intel_dp argument in the helper function.
>
> Signed-off-by: Ankit Nautiyal <[email protected]>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 13 +++++--------
> 1 file changed, 5 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 99d72b345907..d8ef4dccf0c1 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1177,19 +1177,16 @@ static bool intel_dp_supports_dsc(struct intel_dp
> *intel_dp,
> drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd);
> }
>
> -static bool intel_dp_is_ycbcr420(struct intel_dp *intel_dp,
> - const struct intel_crtc_state *crtc_state)
> +static bool intel_dp_is_ycbcr420(const struct intel_crtc_state *crtc_state)
> {
> - return crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
> - (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR444 &&
> - intel_dp->dfp.ycbcr_444_to_420);
> + return crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420;
> }
>
> static int intel_dp_hdmi_compute_bpc(struct intel_dp *intel_dp,
> const struct intel_crtc_state *crtc_state,
> int bpc, bool respect_downstream_limits)
> {
> - bool ycbcr420_output = intel_dp_is_ycbcr420(intel_dp, crtc_state);
> + bool ycbcr420_output = intel_dp_is_ycbcr420(crtc_state);
> int clock = crtc_state->hw.adjusted_mode.crtc_clock;
I think I'd take this a notch further and start passing
the sink_format to most (maybe even all?) places that
currently take a 'bool ycbcr420_output'. That could also
serve as a slight step towards 4:2:2 support.
>
> /*
> @@ -1986,7 +1983,7 @@ intel_dp_compute_output_format(struct intel_encoder
> *encoder,
>
> crtc_state->output_format = intel_dp_output_format(connector,
> ycbcr_420_only);
>
> - if (ycbcr_420_only && !intel_dp_is_ycbcr420(intel_dp, crtc_state)) {
> + if (ycbcr_420_only && !intel_dp_is_ycbcr420(crtc_state)) {
> drm_dbg_kms(&i915->drm,
> "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not
> possible. Falling back to RGB.\n");
> crtc_state->output_format = INTEL_OUTPUT_FORMAT_RGB;
> @@ -2001,7 +1998,7 @@ intel_dp_compute_output_format(struct intel_encoder
> *encoder,
> ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
> respect_downstream_limits);
> if (ret) {
> - if (intel_dp_is_ycbcr420(intel_dp, crtc_state) ||
> + if (intel_dp_is_ycbcr420(crtc_state) ||
> !connector->base.ycbcr_420_allowed ||
> !drm_mode_is_420_also(info, adjusted_mode))
> return ret;
> --
> 2.25.1
--
Ville Syrjälä
Intel
