> -----Original Message----- > From: Hogander, Jouni <[email protected]> > Sent: Friday, October 21, 2022 8:49 AM > To: [email protected] > Cc: Hogander, Jouni <[email protected]>; Souza, Jose > <[email protected]>; Kahola, Mika <[email protected]>; Gupta, > Anshuman <[email protected]> > Subject: [PATCH] drm/i915/psr: Remove inappropriate DSC slice alignment > warning > > Selective update area is now aligned with DSC slice height when DSC is > enabled. > Remove inappropriate warning about missing DSC alignment. > > Cc: José Roberto de Souza <[email protected]> > Cc: Mika Kahola <[email protected]> > > Fixes: 47d4ae2192cb ("drm/i915/mtl: Extend PSR support") > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/7212 > Signed-off-by: Jouni Högander <[email protected]> > Signed-off-by: Anshuman Gupta <[email protected]>
Reviewed-by: Mika Kahola <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_psr.c | 3 --- > 1 file changed, 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > b/drivers/gpu/drm/i915/display/intel_psr.c > index 904a1049eff3..64e9e134fdca 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -1678,9 +1678,6 @@ static void > intel_psr2_sel_fetch_pipe_alignment(const struct intel_crtc_state *c > pipe_clip->y1 -= pipe_clip->y1 % y_alignment; > if (pipe_clip->y2 % y_alignment) > pipe_clip->y2 = ((pipe_clip->y2 / y_alignment) + 1) * > y_alignment; > - > - if (IS_ALDERLAKE_P(dev_priv) && crtc_state->dsc.compression_enable) > - drm_warn(&dev_priv->drm, "Missing PSR2 sel fetch alignment > with DSC\n"); > } > > /* > -- > 2.34.1
