> -----Original Message-----
> From: Jani Nikula <jani.nik...@linux.intel.com>
> Sent: Friday, October 21, 2022 1:32 AM
> To: Srivatsa, Anusha <anusha.sriva...@intel.com>; intel-
> g...@lists.freedesktop.org
> Cc: Vivekanandan, Balasubramani
> <balasubramani.vivekanan...@intel.com>
> Subject: Re: [Intel-gfx] [PATCH 3/4] drm/i915/display: Move chunks of code
> out of bxt_set_cdclk()
>
> On Thu, 20 Oct 2022, Anusha Srivatsa <anusha.sriva...@intel.com> wrote:
> > No functional change. Moving segments out to simplify
> > bxt_set_cdlck()
> >
> > Cc: Balasubramani Vivekanandan
> <balasubramani.vivekanan...@intel.com>
> > Cc: Ville Syrjälä <ville.syrj...@linux.intel.com>
> > Signed-off-by: Anusha Srivatsa <anusha.sriva...@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_cdclk.c | 40
> > ++++++++++++++--------
> > 1 file changed, 25 insertions(+), 15 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
> > b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > index 45babbc6290f..8701796788e3 100644
> > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > @@ -1684,6 +1684,27 @@ static u32 cdclk_squash_waveform(struct
> drm_i915_private *dev_priv,
> > return 0xffff;
> > }
> >
> > +static void icl_cdclk_pll(struct drm_i915_private *i915, int vco)
>
> The function name reads like it leaves something hanging in the air.
>
> icl cdclk pll *what*?
>
> Maybe update?
s/ icl_cdclk_pll/ icl_cdclk_pll_update.
Will make this ichange.
Thanks,
Anusha
> BR,
> Jani.
>
> > +{
> > + if (i915->display.cdclk.hw.vco != 0 &&
> > + i915->display.cdclk.hw.vco != vco)
> > + icl_cdclk_pll_disable(i915);
> > +
> > + if (i915->display.cdclk.hw.vco != vco)
> > + icl_cdclk_pll_enable(i915, vco);
> > +}
> > +
> > +static void bxt_cdclk_pll(struct drm_i915_private *i915, int vco) {
> > + if (i915->display.cdclk.hw.vco != 0 &&
> > + i915->display.cdclk.hw.vco != vco)
> > + bxt_de_pll_disable(i915);
> > +
> > + if (i915->display.cdclk.hw.vco != vco)
> > + bxt_de_pll_enable(i915, vco);
> > +
> > +}
> > +
> > static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
> > const struct intel_cdclk_config *cdclk_config,
> > enum pipe pipe)
> > @@ -1719,21 +1740,10 @@ static void bxt_set_cdclk(struct
> drm_i915_private *dev_priv,
> > if (HAS_CDCLK_CRAWL(dev_priv) && dev_priv->display.cdclk.hw.vco
> > 0 && vco > 0) {
> > if (dev_priv->display.cdclk.hw.vco != vco)
> > adlp_cdclk_pll_crawl(dev_priv, vco);
> > - } else if (DISPLAY_VER(dev_priv) >= 11) {
> > - if (dev_priv->display.cdclk.hw.vco != 0 &&
> > - dev_priv->display.cdclk.hw.vco != vco)
> > - icl_cdclk_pll_disable(dev_priv);
> > -
> > - if (dev_priv->display.cdclk.hw.vco != vco)
> > - icl_cdclk_pll_enable(dev_priv, vco);
> > - } else {
> > - if (dev_priv->display.cdclk.hw.vco != 0 &&
> > - dev_priv->display.cdclk.hw.vco != vco)
> > - bxt_de_pll_disable(dev_priv);
> > -
> > - if (dev_priv->display.cdclk.hw.vco != vco)
> > - bxt_de_pll_enable(dev_priv, vco);
> > - }
> > + } else if (DISPLAY_VER(dev_priv) >= 11)
> > + icl_cdclk_pll(dev_priv, vco);
> > + else
> > + bxt_cdclk_pll(dev_priv, vco);
> >
> > waveform = cdclk_squash_waveform(dev_priv, cdclk);
>
> --
> Jani Nikula, Intel Open Source Graphics Center
