On Fri, Mar 31, 2023 at 03:46:09PM +0530, Ankit Nautiyal wrote: > The final link bpp used to calculate the m_n values depend on the > output_format. Though the output_format is set to RGB for MST case and > the link bpp will be same as the pipe bpp, for the sake of semantics, > lets calculate the m_n values with the link bpp, instead of pipe_bpp. > > Signed-off-by: Ankit Nautiyal <[email protected]>
Reviewed-by: Ville Syrjälä <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_dp.c | 2 +- > drivers/gpu/drm/i915/display/intel_dp.h | 1 + > drivers/gpu/drm/i915/display/intel_dp_mst.c | 5 ++++- > 3 files changed, 6 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index e5903b5e511b..8d819b2963de 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -928,7 +928,7 @@ int intel_dp_min_bpp(enum intel_output_format > output_format) > return 8 * 3; > } > > -static int intel_dp_output_bpp(enum intel_output_format output_format, int > bpp) > +int intel_dp_output_bpp(enum intel_output_format output_format, int bpp) > { > /* > * bpp value was assumed to RGB format. And YCbCr 4:2:0 output > diff --git a/drivers/gpu/drm/i915/display/intel_dp.h > b/drivers/gpu/drm/i915/display/intel_dp.h > index db86c2b71c1f..856172bfa13e 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.h > +++ b/drivers/gpu/drm/i915/display/intel_dp.h > @@ -140,5 +140,6 @@ void intel_dp_pcon_dsc_configure(struct intel_dp > *intel_dp, > void intel_dp_phy_test(struct intel_encoder *encoder); > > void intel_dp_wait_source_oui(struct intel_dp *intel_dp); > +int intel_dp_output_bpp(enum intel_output_format output_format, int bpp); > > #endif /* __INTEL_DP_H__ */ > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c > b/drivers/gpu/drm/i915/display/intel_dp_mst.c > index daa1591a9ae8..fec3f310fc9b 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > @@ -130,6 +130,7 @@ static int intel_dp_mst_compute_link_config(struct > intel_encoder *encoder, > const struct drm_display_mode *adjusted_mode = > &crtc_state->hw.adjusted_mode; > int slots = -EINVAL; > + int link_bpp; > > slots = intel_dp_mst_find_vcpi_slots_for_bpp(encoder, crtc_state, > limits->max_bpp, > limits->min_bpp, limits, > @@ -138,7 +139,9 @@ static int intel_dp_mst_compute_link_config(struct > intel_encoder *encoder, > if (slots < 0) > return slots; > > - intel_link_compute_m_n(crtc_state->pipe_bpp, > + link_bpp = intel_dp_output_bpp(crtc_state->output_format, > crtc_state->pipe_bpp); > + > + intel_link_compute_m_n(link_bpp, > crtc_state->lane_count, > adjusted_mode->crtc_clock, > crtc_state->port_clock, > -- > 2.25.1 -- Ville Syrjälä Intel
