From: Ville Syrjälä <ville.syrj...@linux.intel.com>

WA 0479 says: "Do not skip both TP1 and TP2/TP3". Let's just
stick the minimum 100us TP2/3 time in there to avoid that.

Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
b/drivers/gpu/drm/i915/display/intel_psr.c
index 92369f95ee88..97e609365db4 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -628,6 +628,15 @@ static u32 intel_psr1_get_tp_time(struct intel_dp 
*intel_dp)
        else
                val |= EDP_PSR_TP2_TP3_TIME_2500us;
 
+       /*
+        * WA 0479: hsw,bdw
+        * "Do not skip both TP1 and TP2/TP3"
+        */
+       if (DISPLAY_VER(dev_priv) < 9 &&
+           connector->panel.vbt.psr.tp1_wakeup_time_us == 0 &&
+           connector->panel.vbt.psr.tp2_tp3_wakeup_time_us == 0)
+               val |= EDP_PSR_TP2_TP3_TIME_100us;
+
 check_tp3_sel:
        if (intel_dp_source_supports_tps3(dev_priv) &&
            drm_dp_tps3_supported(intel_dp->dpcd))
-- 
2.39.3

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