Atm the MST encoder config computation may use an out-of-date pbn_div value, if the sink is unplugged and a sink is replugged with different link rate/lane count capabilities. The current way of reinitializing pbn_div depends on pbn_div getting cleared via intel_atomic_check() -> drm_dp_mst_atomic_check() -> drm_dp_mst_atomic_check_payload_alloc_limits(), however the clearing won't happen if the sink got unplugged (and hence drm_dp_mst_topology_mgr::mst_state being false).
To fix the above, simply update pbn_div unconditionally during config computation, making pbn_div always match the link rate and lane count. Cc: Lyude Paul <[email protected]> Signed-off-by: Imre Deak <[email protected]> --- drivers/gpu/drm/i915/display/intel_dp_mst.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 648cf37e02a87..42ddfc85d72d6 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -94,12 +94,9 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder, crtc_state->lane_count = limits->max_lane_count; crtc_state->port_clock = limits->max_rate; - // TODO: Handle pbn_div changes by adding a new MST helper - if (!mst_state->pbn_div) { - mst_state->pbn_div = drm_dp_get_vc_payload_bw(&intel_dp->mst_mgr, - crtc_state->port_clock, - crtc_state->lane_count); - } + mst_state->pbn_div = drm_dp_get_vc_payload_bw(&intel_dp->mst_mgr, + crtc_state->port_clock, + crtc_state->lane_count); for (bpp = max_bpp; bpp >= min_bpp; bpp -= step) { drm_dbg_kms(&i915->drm, "Trying bpp %d\n", bpp); -- 2.39.2
