On Wed, 01 Nov 2023, Ville Syrjala <[email protected]> wrote:
> From: Ville Syrjälä <[email protected]>
>
> The code to determine the pre-ICL DSI port control register is
> repeated several times. Consolidate.
>
> vlv_dsi_clear_device_ready() is left with the open-coded version
> due to the weirdness with port A vs. C on VLV/CHV.
>
> Signed-off-by: Ville Syrjälä <[email protected]>

Reviewed-by: Jani Nikula <[email protected]>

> ---
>  drivers/gpu/drm/i915/display/vlv_dsi.c | 17 ++++++++++-------
>  1 file changed, 10 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c 
> b/drivers/gpu/drm/i915/display/vlv_dsi.c
> index 64023fb8dd74..bda49734ca33 100644
> --- a/drivers/gpu/drm/i915/display/vlv_dsi.c
> +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
> @@ -561,6 +561,12 @@ static void glk_dsi_clear_device_ready(struct 
> intel_encoder *encoder)
>       glk_dsi_disable_mipi_io(encoder);
>  }
>  
> +static i915_reg_t port_ctrl_reg(struct drm_i915_private *i915, enum port 
> port)
> +{
> +     return IS_GEMINILAKE(i915) || IS_BROXTON(i915) ?
> +             BXT_MIPI_PORT_CTRL(port) : MIPI_PORT_CTRL(port);
> +}
> +
>  static void vlv_dsi_clear_device_ready(struct intel_encoder *encoder)
>  {
>       struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> @@ -627,8 +633,7 @@ static void intel_dsi_port_enable(struct intel_encoder 
> *encoder,
>       }
>  
>       for_each_dsi_port(port, intel_dsi->ports) {
> -             i915_reg_t port_ctrl = IS_GEMINILAKE(dev_priv) || 
> IS_BROXTON(dev_priv) ?
> -                     BXT_MIPI_PORT_CTRL(port) : MIPI_PORT_CTRL(port);
> +             i915_reg_t port_ctrl = port_ctrl_reg(dev_priv, port);
>               u32 temp;
>  
>               temp = intel_de_read(dev_priv, port_ctrl);
> @@ -664,8 +669,7 @@ static void intel_dsi_port_disable(struct intel_encoder 
> *encoder)
>       enum port port;
>  
>       for_each_dsi_port(port, intel_dsi->ports) {
> -             i915_reg_t port_ctrl = IS_GEMINILAKE(dev_priv) || 
> IS_BROXTON(dev_priv) ?
> -                     BXT_MIPI_PORT_CTRL(port) : MIPI_PORT_CTRL(port);
> +             i915_reg_t port_ctrl = port_ctrl_reg(dev_priv, port);
>  
>               /* de-assert ip_tg_enable signal */
>               intel_de_rmw(dev_priv, port_ctrl, DPI_ENABLE, 0);
> @@ -955,9 +959,8 @@ static bool intel_dsi_get_hw_state(struct intel_encoder 
> *encoder,
>  
>       /* XXX: this only works for one DSI output */
>       for_each_dsi_port(port, intel_dsi->ports) {
> -             i915_reg_t ctrl_reg = IS_GEMINILAKE(dev_priv) || 
> IS_BROXTON(dev_priv) ?
> -                     BXT_MIPI_PORT_CTRL(port) : MIPI_PORT_CTRL(port);
> -             bool enabled = intel_de_read(dev_priv, ctrl_reg) & DPI_ENABLE;
> +             i915_reg_t port_ctrl = port_ctrl_reg(dev_priv, port);
> +             bool enabled = intel_de_read(dev_priv, port_ctrl) & DPI_ENABLE;
>  
>               /*
>                * Due to some hardware limitations on VLV/CHV, the DPI enable

-- 
Jani Nikula, Intel

Reply via email to