If the selective fetch is not optimal, use FBC
Bspec: 68881
Signed-off-by: Vinod Govindapillai <[email protected]>
---
drivers/gpu/drm/i915/display/intel_fbc.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
b/drivers/gpu/drm/i915/display/intel_fbc.c
index bde12fe62275..1c32d85dc688 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1202,8 +1202,15 @@ static int intel_fbc_check_plane(struct
intel_atomic_state *state,
* Bspec: 50422 HSD: 14010260002
*/
if (DISPLAY_VER(i915) >= 12 && crtc_state->has_psr2) {
- plane_state->no_fbc_reason = "PSR2 enabled";
- return 0;
+ if (DISPLAY_VER(i915) >= 20)
+ plane_state->no_fbc_reason =
+ crtc_state->full_frame_fetch ? NULL :
+ "PSR2 selective fetch enabled";
+ else
+ plane_state->no_fbc_reason = "PSR2 enabled";
+
+ if (plane_state->no_fbc_reason)
+ return 0;
}
/* Wa_14016291713 */
--
2.34.1
