From: Ville Syrjälä <[email protected]> We can have multiple pipes, but only one AGPBUSY# bit. So we need a reference correctly figure out whether the bits needs to be set.
Signed-off-by: Ville Syrjälä <[email protected]> --- drivers/gpu/drm/i915/i915_drv.h | 3 +++ drivers/gpu/drm/i915/i915_irq.c | 4 ++-- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index e908c99..fe4ba16 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1442,6 +1442,9 @@ typedef struct drm_i915_private { u32 hpd_event_bits; struct timer_list hotplug_reenable_timer; + /* AGPBUSY# wakeup mechanism needed? Gen3 only. */ + unsigned int agpbusy_ref; + int num_plane; struct i915_fbc fbc; diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 0a7a4af..049244b 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -2263,7 +2263,7 @@ static int i915_enable_vblank(struct drm_device *dev, int pipe) spin_lock_irqsave(&dev_priv->irq_lock, irqflags); /* maintain vblank delivery even in deep C-states */ - if (dev_priv->info->gen == 3) + if (dev_priv->info->gen == 3 && dev_priv->agpbusy_ref++ == 0) I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_AGPBUSY_EN)); if (INTEL_INFO(dev)->gen >= 4) @@ -2348,7 +2348,7 @@ static void i915_disable_vblank(struct drm_device *dev, int pipe) PIPE_VBLANK_INTERRUPT_ENABLE | PIPE_START_VBLANK_INTERRUPT_ENABLE); - if (dev_priv->info->gen == 3) + if (dev_priv->info->gen == 3 && --dev_priv->agpbusy_ref == 0) I915_WRITE(INSTPM, _MASKED_BIT_DISABLE(INSTPM_AGPBUSY_EN)); spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); -- 1.8.3.2 _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
