> -----Original Message----- > From: Intel-gfx <[email protected]> On Behalf Of Ville > Syrjala > Sent: Friday, February 9, 2024 8:38 PM > To: [email protected] > Subject: [PATCH 1/5] drm/i915: Fix PLL state check for gmch platforms > > From: Ville Syrjälä <[email protected]> > > GMCH DPLL state check was mistakenly removed in commit 87fc875a2b85 > ("drm/i915/dg2: Skip shared DPLL handling"). > Bring it back. >
Reviewed-by: Mika Kahola <[email protected]> > Signed-off-by: Ville Syrjälä <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_display.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c > b/drivers/gpu/drm/i915/display/intel_display.c > index 7db0655d8c9e..f20728b7f67b 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -5215,9 +5215,11 @@ intel_pipe_config_compare(const struct > intel_crtc_state *current_config, > > PIPE_CONF_CHECK_BOOL(double_wide); > > - if (dev_priv->display.dpll.mgr) { > + if (dev_priv->display.dpll.mgr) > PIPE_CONF_CHECK_P(shared_dpll); > > + /* FIXME convert everything over the dpll_mgr */ > + if (dev_priv->display.dpll.mgr || HAS_GMCH(dev_priv)) { > PIPE_CONF_CHECK_X(dpll_hw_state.dpll); > PIPE_CONF_CHECK_X(dpll_hw_state.dpll_md); > PIPE_CONF_CHECK_X(dpll_hw_state.fp0); > -- > 2.43.0
