Currently, the driver is only waiting for 1ms for
idle patterns. But starting from LNL and beyond,
the MST wants the driver to wait for 1640us before
timing out (which we round up to 2ms).
v1: Introduced the 2ms wait timeout.
v2: Segregated the wait timeout for platforms before & after LNL.
v3: Fixed 2 cosmetic changes.
BSpec: 68849
Signed-off-by: Shekhar Chauhan <shekhar.chau...@intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 15 +++++++++++----
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index bea441590204..b59adb7685b8 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3677,12 +3677,19 @@ static void intel_ddi_set_idle_link_train(struct
intel_dp *intel_dp,
*/
if (port == PORT_A && DISPLAY_VER(dev_priv) < 12)
return;
-
- if (intel_de_wait_for_set(dev_priv,
- dp_tp_status_reg(encoder, crtc_state),
- DP_TP_STATUS_IDLE_DONE, 1))
+ if (DISPLAY_VER(dev_priv) >= 20) {
+ if (intel_de_wait_for_set(dev_priv,
+ dp_tp_status_reg(encoder, crtc_state),
+ DP_TP_STATUS_IDLE_DONE, 2))
+ drm_err(&dev_priv->drm,
+ "Timed out waiting for DP idle patterns\n");
+ } else {
+ if (intel_de_wait_for_set(dev_priv,
+ dp_tp_status_reg(encoder, crtc_state),
+ DP_TP_STATUS_IDLE_DONE, 1))
drm_err(&dev_priv->drm,
"Timed out waiting for DP idle patterns\n");
+ }
}
static bool intel_ddi_is_audio_enabled(struct drm_i915_private *dev_priv,
--
2.34.1
