Load the lut values during pipe enable.
v2: Add the display version check
Signed-off-by: Nemesa Garg <nemesa.g...@intel.com>
---
drivers/gpu/drm/i915/display/intel_crtc.c | 3 +++
drivers/gpu/drm/i915/display/intel_display.c | 14 +++++++++++++-
drivers/gpu/drm/i915/display/skl_scaler.c | 13 ++++++++++++-
3 files changed, 28 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c
b/drivers/gpu/drm/i915/display/intel_crtc.c
index 25593f6aae7d..74c498733283 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -383,6 +383,9 @@ int intel_crtc_init(struct drm_i915_private *dev_priv, enum
pipe pipe)
drm_WARN_ON(&dev_priv->drm, drm_crtc_index(&crtc->base) != crtc->pipe);
+ if (DISPLAY_VER(dev_priv) >= 20)
+ drm_crtc_create_sharpening_strength_property(&crtc->base);
+
return 0;
fail:
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 3d05bd203ca8..b1384a8d9e5d 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1722,6 +1722,9 @@ static void hsw_crtc_enable(struct intel_atomic_state
*state,
intel_crtc_wait_for_next_vblank(wa_crtc);
intel_crtc_wait_for_next_vblank(wa_crtc);
}
+
+ if (new_crtc_state->hw.casf_params.strength_changed)
+ intel_filter_lut_load(crtc, new_crtc_state);
}
void ilk_pfit_disable(const struct intel_crtc_state *old_crtc_state)
@@ -2444,8 +2447,12 @@ static int intel_crtc_compute_config(struct
intel_atomic_state *state,
if (crtc_state->has_pch_encoder)
return ilk_fdi_compute_config(crtc, crtc_state);
- if (crtc_state->hw.casf_params.strength_changed)
+ intel_sharpen_strength_changed(state);
+
+ if (crtc_state->hw.casf_params.strength_changed) {
intel_sharpness_scaler_compute_config(crtc_state);
+ intel_filter_compute_config(crtc_state);
+ }
return 0;
}
@@ -6340,6 +6347,8 @@ int intel_atomic_check(struct drm_device *dev,
intel_vrr_check_modeset(state);
+ intel_sharpen_strength_changed(state);
+
ret = drm_atomic_helper_check_modeset(dev, &state->base);
if (ret)
goto fail;
@@ -6695,6 +6704,9 @@ static void intel_pre_update_crtc(struct
intel_atomic_state *state,
intel_vrr_set_transcoder_timings(new_crtc_state);
}
+ if (new_crtc_state->hw.casf_params.strength_changed)
+ intel_sharpen_filter_enable(new_crtc_state);
+
intel_fbc_update(state, crtc);
drm_WARN_ON(&i915->drm, !intel_display_power_is_enabled(i915,
POWER_DOMAIN_DC_OFF));
diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c
b/drivers/gpu/drm/i915/display/skl_scaler.c
index 5784947175a8..ee5d52244cd4 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.c
+++ b/drivers/gpu/drm/i915/display/skl_scaler.c
@@ -932,7 +932,7 @@ void skl_scaler_get_config(struct intel_crtc_state
*crtc_state)
/* find scaler attached to this pipe */
for (i = 0; i < crtc->num_scalers; i++) {
- u32 ctl, pos, size;
+ u32 ctl, pos, size, sharp;
ctl = intel_de_read(dev_priv, SKL_PS_CTRL(crtc->pipe, i));
if ((ctl & (PS_SCALER_EN | PS_BINDING_MASK)) != (PS_SCALER_EN |
PS_BINDING_PIPE))
@@ -940,6 +940,17 @@ void skl_scaler_get_config(struct intel_crtc_state
*crtc_state)
id = i;
+ if (DISPLAY_VER(dev_priv) >= 20) {
+ sharp = intel_de_read(dev_priv,
SHARPNESS_CTL(crtc->pipe));
+ if (sharp & FILTER_EN) {
+ crtc_state->hw.casf_params.strength =
+ REG_FIELD_GET(FILTER_STRENGTH_MASK,
sharp) - 16;
+ crtc_state->hw.casf_params.need_scaler = true;
+ crtc_state->hw.casf_params.win_size =
+ REG_FIELD_GET(FILTER_SIZE_MASK, sharp);
+ }
+ }
+
if (!crtc_state->hw.casf_params.need_scaler)
crtc_state->pch_pfit.enabled = true;
--
2.25.1
