On Mon, Apr 15, 2024 at 01:44:16PM +0530, Balasubramani Vivekanandan wrote: > From: José Roberto de Souza <[email protected]> > > No display IP beyond Xe_LPD+ has "BW credits" bits in MBUS_DBOX_CTL > register. Restrict the programming only to Xe_LPD+. > > BSpec: 49213 > CC: Matt Roper <[email protected]> > Signed-off-by: José Roberto de Souza <[email protected]> > Signed-off-by: Balasubramani Vivekanandan > <[email protected]>
Reviewed-by: Matt Roper <[email protected]> > --- > drivers/gpu/drm/i915/display/skl_watermark.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c > b/drivers/gpu/drm/i915/display/skl_watermark.c > index 8436af8525da..baa4b5ad96b7 100644 > --- a/drivers/gpu/drm/i915/display/skl_watermark.c > +++ b/drivers/gpu/drm/i915/display/skl_watermark.c > @@ -3604,7 +3604,7 @@ static void intel_mbus_dbox_update(struct > intel_atomic_state *state) > for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, > new_dbuf_state->active_pipes) { > u32 pipe_val = val; > > - if (DISPLAY_VER(i915) >= 14) { > + if (DISPLAY_VER_FULL(i915) == IP_VER(14, 0)) { > if (xelpdp_is_only_pipe_per_dbuf_bank(crtc->pipe, > > new_dbuf_state->active_pipes)) > pipe_val |= MBUS_DBOX_BW_8CREDITS_MTL; > -- > 2.25.1 > -- Matt Roper Graphics Software Engineer Linux GPU Platform Enablement Intel Corporation
