Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the PIPE_CRC_RES_RES2_G4X register macro.
Signed-off-by: Jani Nikula <[email protected]> --- drivers/gpu/drm/i915/display/intel_display_irq.c | 3 ++- drivers/gpu/drm/i915/i915_reg.h | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c index b83e4f312f7e..04e867db0878 100644 --- a/drivers/gpu/drm/i915/display/intel_display_irq.c +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c @@ -383,7 +383,8 @@ static void i9xx_pipe_crc_irq_handler(struct drm_i915_private *dev_priv, res1 = 0; if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv)) - res2 = intel_uncore_read(&dev_priv->uncore, PIPE_CRC_RES_RES2_G4X(pipe)); + res2 = intel_uncore_read(&dev_priv->uncore, + PIPE_CRC_RES_RES2_G4X(dev_priv, pipe)); else res2 = 0; diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 8c79bfc02714..c9bd827eba60 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1660,7 +1660,7 @@ #define PIPE_CRC_RES_GREEN(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_RES_GREEN_A) #define PIPE_CRC_RES_BLUE(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_RES_BLUE_A) #define PIPE_CRC_RES_RES1_I915(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_RES_RES1_A_I915) -#define PIPE_CRC_RES_RES2_G4X(pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_RES_RES2_A_G4X) +#define PIPE_CRC_RES_RES2_G4X(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_RES_RES2_A_G4X) /* Pipe/transcoder A timing regs */ #define _TRANS_HTOTAL_A 0x60000 -- 2.39.2
