On Mon, Apr 29, 2024 at 05:02:16PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the PIPE_WGC_C01_C00 register macro.
> 
> Signed-off-by: Jani Nikula <[email protected]>

Reviewed-by: Rodrigo Vivi <[email protected]>

> ---
>  drivers/gpu/drm/i915/display/intel_color.c      | 4 ++--
>  drivers/gpu/drm/i915/display/intel_color_regs.h | 2 +-
>  2 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_color.c 
> b/drivers/gpu/drm/i915/display/intel_color.c
> index edb805fc9c97..cdcf8e796335 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.c
> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> @@ -616,7 +616,7 @@ static void vlv_load_wgc_csc(struct intel_crtc *crtc,
>       struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>       enum pipe pipe = crtc->pipe;
>  
> -     intel_de_write_fw(dev_priv, PIPE_WGC_C01_C00(pipe),
> +     intel_de_write_fw(dev_priv, PIPE_WGC_C01_C00(dev_priv, pipe),
>                         csc->coeff[1] << 16 | csc->coeff[0]);
>       intel_de_write_fw(dev_priv, PIPE_WGC_C02(pipe),
>                         csc->coeff[2]);
> @@ -639,7 +639,7 @@ static void vlv_read_wgc_csc(struct intel_crtc *crtc,
>       enum pipe pipe = crtc->pipe;
>       u32 tmp;
>  
> -     tmp = intel_de_read_fw(dev_priv, PIPE_WGC_C01_C00(pipe));
> +     tmp = intel_de_read_fw(dev_priv, PIPE_WGC_C01_C00(dev_priv, pipe));
>       csc->coeff[0] = tmp & 0xffff;
>       csc->coeff[1] = tmp >> 16;
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_color_regs.h 
> b/drivers/gpu/drm/i915/display/intel_color_regs.h
> index 250ceffbd481..57438989f469 100644
> --- a/drivers/gpu/drm/i915/display/intel_color_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_color_regs.h
> @@ -256,7 +256,7 @@
>  #define _PIPE_A_WGC_C21_C20  0x600C0 /* s2.10 */
>  #define _PIPE_A_WGC_C22              0x600C4 /* s2.10 */
>  
> -#define PIPE_WGC_C01_C00(pipe)               _MMIO_TRANS2(dev_priv, pipe, 
> _PIPE_A_WGC_C01_C00)
> +#define PIPE_WGC_C01_C00(dev_priv, pipe)             _MMIO_TRANS2(dev_priv, 
> pipe, _PIPE_A_WGC_C01_C00)
>  #define PIPE_WGC_C02(pipe)           _MMIO_TRANS2(dev_priv, pipe, 
> _PIPE_A_WGC_C02)
>  #define PIPE_WGC_C11_C10(pipe)               _MMIO_TRANS2(dev_priv, pipe, 
> _PIPE_A_WGC_C11_C10)
>  #define PIPE_WGC_C12(pipe)           _MMIO_TRANS2(dev_priv, pipe, 
> _PIPE_A_WGC_C12)
> -- 
> 2.39.2
> 

Reply via email to