Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PORT_ALPM_LFPS_CTL register macro.

Signed-off-by: Jani Nikula <[email protected]>
---
 drivers/gpu/drm/i915/display/intel_psr.c      | 3 ++-
 drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 +-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
b/drivers/gpu/drm/i915/display/intel_psr.c
index e88f326b78d6..664ffda6a86d 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1798,7 +1798,8 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp)
                               PORT_ALPM_CTL_SILENCE_PERIOD(
                                       
psr->alpm_parameters.silence_period_sym_clocks));
 
-               intel_de_write(dev_priv, PORT_ALPM_LFPS_CTL(cpu_transcoder),
+               intel_de_write(dev_priv,
+                              PORT_ALPM_LFPS_CTL(dev_priv, cpu_transcoder),
                               PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT(10) |
                               PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION(
                                       
psr->alpm_parameters.lfps_half_cycle_num_of_syms) |
diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h 
b/drivers/gpu/drm/i915/display/intel_psr_regs.h
index 5e52dddacf91..08c6d488e89d 100644
--- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
@@ -345,7 +345,7 @@
 #define  PORT_ALPM_CTL_SILENCE_PERIOD(val)     
REG_FIELD_PREP(PORT_ALPM_CTL_SILENCE_PERIOD_MASK, val)
 
 #define _PORT_ALPM_LFPS_CTL_A                                  0x16fa30
-#define PORT_ALPM_LFPS_CTL(tran)                               
_MMIO_TRANS2(dev_priv, tran, _PORT_ALPM_LFPS_CTL_A)
+#define PORT_ALPM_LFPS_CTL(dev_priv, tran)                             
_MMIO_TRANS2(dev_priv, tran, _PORT_ALPM_LFPS_CTL_A)
 #define  PORT_ALPM_LFPS_CTL_LFPS_START_POLARITY                        
REG_BIT(31)
 #define  PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT_MASK              REG_GENMASK(27, 
24)
 #define  PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT_MIN               7
-- 
2.39.2

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