> -----Original Message-----
> From: Intel-gfx <[email protected]> On Behalf Of Mitul
> Golani
> Sent: Tuesday, May 28, 2024 1:48 PM
> To: [email protected]
> Subject: [PATCH v1 1/1] drm/i915/display: WA for Re-initialize dispcnlunitt1
> xosc
> clock
>
> The dispcnlunit1_cp_xosc_clk should be de-asserted in display off and only
> asserted in display on. But during observation it found clk remains active in
> display
> OFF. As workaround, Display driver shall execute set-reset sequence at the
> end of
> the Initialize Sequence.
>
> Wa_15013987218
>
> Signed-off-by: Mitul Golani <[email protected]>
> ---
> drivers/gpu/drm/i915/display/intel_display_power.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c
> b/drivers/gpu/drm/i915/display/intel_display_power.c
> index a860d88a65da..af2960c7e5b8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -1704,6 +1704,14 @@ static void icl_display_core_init(struct
> drm_i915_private *dev_priv,
> /* Wa_14011503030:xelpd */
> if (DISPLAY_VER(dev_priv) == 13)
> intel_de_write(dev_priv, XELPD_DISPLAY_ERR_FATAL_MASK,
> ~0);
> +
> + /* Wa_14020225554 */
Hi,
Here also you mention this number Wa_15013987218.
Thanks,
Nemesa
> + if (DISPLAY_VER(dev_priv) == 20) {
> + intel_de_write(dev_priv, SOUTH_DSPCLK_GATE_D,
> + PCH_GMBUSUNIT_CLOCK_GATE_DISABLE);
> + intel_de_rmw(dev_priv, SOUTH_DSPCLK_GATE_D,
> + PCH_GMBUSUNIT_CLOCK_GATE_DISABLE, 0);
> + }
> }
>
> static void icl_display_core_uninit(struct drm_i915_private *dev_priv)
> --
> 2.25.1
