On Tue, Jun 04, 2024 at 06:25:48PM +0300, Jani Nikula wrote: > Avoid the implicit dev_priv local variable use, and pass dev_priv > explicitly to the PIPE_FLIPCOUNT_G4X register macro.
Reviewed-by: Rodrigo Vivi <[email protected]> > > Signed-off-by: Jani Nikula <[email protected]> > --- > drivers/gpu/drm/i915/gvt/cmd_parser.c | 2 +- > drivers/gpu/drm/i915/gvt/handlers.c | 4 ++-- > drivers/gpu/drm/i915/i915_reg.h | 2 +- > drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 8 ++++---- > 4 files changed, 8 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c > b/drivers/gpu/drm/i915/gvt/cmd_parser.c > index 9cdb53015d16..2f4c9c66b40b 100644 > --- a/drivers/gpu/drm/i915/gvt/cmd_parser.c > +++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c > @@ -1437,7 +1437,7 @@ static int gen8_update_plane_mmio_from_mi_display_flip( > } > > if (info->plane == PLANE_PRIMARY) > - vgpu_vreg_t(vgpu, PIPE_FLIPCOUNT_G4X(info->pipe))++; > + vgpu_vreg_t(vgpu, PIPE_FLIPCOUNT_G4X(dev_priv, info->pipe))++; > > if (info->async_flip) > intel_vgpu_trigger_virtual_event(vgpu, info->event); > diff --git a/drivers/gpu/drm/i915/gvt/handlers.c > b/drivers/gpu/drm/i915/gvt/handlers.c > index 039d2cb273df..bb904266c3cd 100644 > --- a/drivers/gpu/drm/i915/gvt/handlers.c > +++ b/drivers/gpu/drm/i915/gvt/handlers.c > @@ -1021,7 +1021,7 @@ static int pri_surf_mmio_write(struct intel_vgpu *vgpu, > unsigned int offset, > write_vreg(vgpu, offset, p_data, bytes); > vgpu_vreg_t(vgpu, DSPSURFLIVE(dev_priv, pipe)) = vgpu_vreg(vgpu, > offset); > > - vgpu_vreg_t(vgpu, PIPE_FLIPCOUNT_G4X(pipe))++; > + vgpu_vreg_t(vgpu, PIPE_FLIPCOUNT_G4X(dev_priv, pipe))++; > > if (vgpu_vreg_t(vgpu, DSPCNTR(dev_priv, pipe)) & PLANE_CTL_ASYNC_FLIP) > intel_vgpu_trigger_virtual_event(vgpu, event); > @@ -1063,7 +1063,7 @@ static int reg50080_mmio_write(struct intel_vgpu *vgpu, > write_vreg(vgpu, offset, p_data, bytes); > if (plane == PLANE_PRIMARY) { > vgpu_vreg_t(vgpu, DSPSURFLIVE(dev_priv, pipe)) = > vgpu_vreg(vgpu, offset); > - vgpu_vreg_t(vgpu, PIPE_FLIPCOUNT_G4X(pipe))++; > + vgpu_vreg_t(vgpu, PIPE_FLIPCOUNT_G4X(dev_priv, pipe))++; > } else { > vgpu_vreg_t(vgpu, SPRSURFLIVE(pipe)) = vgpu_vreg(vgpu, offset); > } > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index d62da57afda7..5d9429bf17a8 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -2258,7 +2258,7 @@ > #define _PIPEA_FRMCOUNT_G4X 0x70040 > #define _PIPEA_FLIPCOUNT_G4X 0x70044 > #define PIPE_FRMCOUNT_G4X(dev_priv, pipe) _MMIO_PIPE2(dev_priv, pipe, > _PIPEA_FRMCOUNT_G4X) > -#define PIPE_FLIPCOUNT_G4X(pipe) _MMIO_PIPE2(dev_priv, pipe, > _PIPEA_FLIPCOUNT_G4X) > +#define PIPE_FLIPCOUNT_G4X(dev_priv, pipe) _MMIO_PIPE2(dev_priv, pipe, > _PIPEA_FLIPCOUNT_G4X) > > /* CHV pipe B blender */ > #define _CHV_BLEND_A 0x60a00 > diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c > b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c > index 2e027f3ee750..ba3f734ced0b 100644 > --- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c > +++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c > @@ -138,10 +138,10 @@ static int iterate_generic_mmio(struct > intel_gvt_mmio_table_iter *iter) > MMIO_D(PIPESTAT(dev_priv, PIPE_B)); > MMIO_D(PIPESTAT(dev_priv, PIPE_C)); > MMIO_D(PIPESTAT(dev_priv, _PIPE_EDP)); > - MMIO_D(PIPE_FLIPCOUNT_G4X(PIPE_A)); > - MMIO_D(PIPE_FLIPCOUNT_G4X(PIPE_B)); > - MMIO_D(PIPE_FLIPCOUNT_G4X(PIPE_C)); > - MMIO_D(PIPE_FLIPCOUNT_G4X(_PIPE_EDP)); > + MMIO_D(PIPE_FLIPCOUNT_G4X(dev_priv, PIPE_A)); > + MMIO_D(PIPE_FLIPCOUNT_G4X(dev_priv, PIPE_B)); > + MMIO_D(PIPE_FLIPCOUNT_G4X(dev_priv, PIPE_C)); > + MMIO_D(PIPE_FLIPCOUNT_G4X(dev_priv, _PIPE_EDP)); > MMIO_D(PIPE_FRMCOUNT_G4X(dev_priv, PIPE_A)); > MMIO_D(PIPE_FRMCOUNT_G4X(dev_priv, PIPE_B)); > MMIO_D(PIPE_FRMCOUNT_G4X(dev_priv, PIPE_C)); > -- > 2.39.2 >
