Wa 16021440873 is writing wrong register. Instead of PIPE_SRCSZ_ERLY_TPT
write CURPOS_ERLY_TPT.

v2: use right offset as well

Fixes: 29cdef8539c3 ("drm/i915/display: Implement Wa_16021440873")
Signed-off-by: Jouni Högander <[email protected]>
---
 drivers/gpu/drm/i915/display/intel_cursor.c |  4 ++--
 drivers/gpu/drm/i915/display/intel_psr.c    | 12 +++---------
 2 files changed, 5 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c 
b/drivers/gpu/drm/i915/display/intel_cursor.c
index 7f7fc710350c..66436e526021 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -524,8 +524,8 @@ static void wa_16021440873(struct intel_plane *plane,
 
        intel_de_write_fw(dev_priv, SEL_FETCH_CUR_CTL(pipe), ctl);
 
-       intel_de_write(dev_priv, PIPE_SRCSZ_ERLY_TPT(pipe),
-                      PIPESRC_HEIGHT(et_y_position));
+       intel_de_write(dev_priv, CURPOS_ERLY_TPT(dev_priv, pipe),
+                      CURSOR_POS_Y(et_y_position));
 }
 
 static void i9xx_cursor_update_sel_fetch_arm(struct intel_plane *plane,
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
b/drivers/gpu/drm/i915/display/intel_psr.c
index 3f36b94020ff..2a33e35ceeff 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2164,19 +2164,14 @@ static void psr2_man_trk_ctl_calc(struct 
intel_crtc_state *crtc_state,
        crtc_state->psr2_man_track_ctl = val;
 }
 
-static u32
-psr2_pipe_srcsz_early_tpt_calc(struct intel_crtc_state *crtc_state,
-                              bool full_update, bool cursor_in_su_area)
+static u32 psr2_pipe_srcsz_early_tpt_calc(struct intel_crtc_state *crtc_state,
+                                         bool full_update)
 {
        int width, height;
 
        if (!crtc_state->enable_psr2_su_region_et || full_update)
                return 0;
 
-       if (!cursor_in_su_area)
-               return PIPESRC_WIDTH(0) |
-                       PIPESRC_HEIGHT(drm_rect_height(&crtc_state->pipe_src));
-
        width = drm_rect_width(&crtc_state->psr2_su_area);
        height = drm_rect_height(&crtc_state->psr2_su_area);
 
@@ -2485,8 +2480,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state 
*state,
 skip_sel_fetch_set_loop:
        psr2_man_trk_ctl_calc(crtc_state, full_update);
        crtc_state->pipe_srcsz_early_tpt =
-               psr2_pipe_srcsz_early_tpt_calc(crtc_state, full_update,
-                                              cursor_in_su_area);
+               psr2_pipe_srcsz_early_tpt_calc(crtc_state, full_update);
        return 0;
 }
 
-- 
2.34.1

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