On Thu, 25 Jul 2024, Mitul Golani <[email protected]> wrote:
> AS SDP should be computed when VRR timing generator is also enabled.
> Correct the compute condition to compute params of Adaptive sync SDP
> when VRR timing genrator is enabled along with sink support indication.
>
> Signed-off-by: Mitul Golani <[email protected]>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 5d6568c8e186..dc75d1c14a94 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2617,7 +2617,7 @@ static void intel_dp_compute_as_sdp(struct intel_dp
> *intel_dp,
> const struct drm_display_mode *adjusted_mode =
> &crtc_state->hw.adjusted_mode;
>
> - if (!crtc_state->vrr.enable || intel_dp->as_sdp_supported)
> + if (!(crtc_state->vrr.enable && intel_dp->as_sdp_supported))
> return;
That's the same as
if (!crtc_state->vrr.enable || !intel_dp->as_sdp_supported)
BR,
Jani.
>
> crtc_state->infoframes.enable |=
> intel_hdmi_infoframe_enable(DP_SDP_ADAPTIVE_SYNC);
--
Jani Nikula, Intel
