From: Suraj Kandpal <suraj.kand...@intel.com>

Add condition for P2.PG power down value.

v2: change subject line to better match patch condition

Bspec: 74494
Signed-off-by: Suraj Kandpal <suraj.kand...@intel.com>
Signed-off-by: Matt Atwood <matthew.s.atw...@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cx0_phy.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c 
b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index 342cd508d6f6..3d3abffdae65 100644
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -3144,7 +3144,8 @@ static u8 cx0_power_control_disable_val(struct 
intel_encoder *encoder)
        if (intel_encoder_is_c10phy(encoder))
                return CX0_P2PG_STATE_DISABLE;
 
-       if (IS_BATTLEMAGE(i915) && encoder->port == PORT_A)
+       if ((IS_BATTLEMAGE(i915) && encoder->port == PORT_A) ||
+           (DISPLAY_VER(i915) >= 30 && encoder->type == INTEL_OUTPUT_EDP))
                return CX0_P2PG_STATE_DISABLE;
 
        return CX0_P4PG_STATE_DISABLE;
-- 
2.45.0

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